KC

Kevin Chan

IN Intel: 10 patents #4,046 of 30,777Top 15%
CS Cadence Design Systems: 5 patents #303 of 2,263Top 15%
ST Symbol Technologies: 4 patents #264 of 1,181Top 25%
ZT Zebra Technologies: 1 patents #400 of 699Top 60%
Overall (All Time): #220,059 of 4,157,543Top 6%
20
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
11836940 Three-dimensional sensor acuity recovery assistance Patrick B. Tilley, Ronald Zancola, Aleksandar Rajak, Peter Daly, Sanjeewa Thimirachandra +4 more 2023-12-05
11507722 Method and apparatus for performing incremental compilation using structural netlist comparison Mark Bourgeault 2022-11-22
11507723 Method and apparatus for performing incremental compilation using structural netlist comparison Mark Bourgeault 2022-11-22
10667219 Power source hot swap mode Adrian J. Stagg, Steve Maddigan, James Shoong-Leac Chen 2020-05-26
10531393 Power source hot swap mode Adrian J. Stagg, Steve Maddigan, James Shoong-Leac Chen 2020-01-07
10275557 Method and apparatus for performing incremental compilation using structural netlist comparison Mark Bourgeault 2019-04-30
9826485 Power source hot swap mode Adrian J. Stagg, Steve Maddigan, James Shoong-Leac Chen 2017-11-21
9134780 Apparatus and method for providing adaptive power state control based on ignition input 2015-09-15
8407630 Modeling and cross correlation of design predicted criticalities for optimization of semiconductor manufacturing Emmanuel Drege, Nickhil Jakatdar, Svetlana Litvintseva, Mark A. Miller, Francis Raquel 2013-03-26
8370776 Method and apparatus for compiling intellectual property systems design cores using an incremental compile design flow Terry Borer 2013-02-05
8156450 Method and system for mask optimization Emmanuel Drege, Nickhil Jakatdar, Svetlana Litvintseva, Mark A. Miller, Francis Raquel 2012-04-10
8146024 Method and system for process optimization Emmanuel Drege, Nickhil Jakatdar, Svetlana Litvintseva, Mark A. Miller, Francis Raquel 2012-03-27
7694244 Modeling and cross correlation of design predicted criticalities for optimization of semiconductor manufacturing Emmanuel Drege, Nickhil Jakatdar, Svetlana Litvintseva, Mark A. Miller, Francis Raquel 2010-04-06
7665048 Method and system for inspection optimization in design and production of integrated circuits Emmanuel Drege, Nickhil Jakatdar, Svetlana Litvintseva, Mark A. Miller, Francis Raquel 2010-02-16
7594208 Techniques for automated sweeping of parameters in computer-aided design to achieve optimum performance and resource usage Terry Borer, Ian Chesal, James Schleicher, David W. Mendel, Mike Hutton +7 more 2009-09-22
7464362 Method and apparatus for performing incremental compilation Terry Borer, David Karchmer, Jason Govig, Andrew Leaver, Gabriel Quan +2 more 2008-12-09
7389489 Techniques for editing circuit design files to be compatible with a new programmable IC Ian Chesal, Subianto Windoro, Minh V. Mac, Terry Borer, Stephen D. Brown +2 more 2008-06-17
7257800 Method and apparatus for performing logic replication in field programmable gate arrays Deshanand Singh, Gabriel Quan, Terry Borer, Valavan Manohararajah, Paul McHardy +2 more 2007-08-14
7191426 Method and apparatus for performing incremental compilation on field programmable gate arrays Deshanand Singh, Stephen D. Brown 2007-03-13
7181703 Techniques for automated sweeping of parameters in computer-aided design to achieve optimum performance and resource usage Terry Borer, Ian Chesal, James Schleicher, David W. Mendel, Mike Hutton +7 more 2007-02-20