Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9754065 | Method and apparatus for implementing soft constraints in tools used for designing programmable logic devices | Gabriel Quan, Stephen D. Brown, Deshanand Singh, Chris G. Sanford, Vaughn Betz +2 more | 2017-09-05 |
| 9122826 | Method and apparatus for performing compilation using multiple design flows | Andrew Leaver, David Karchmer, Gabriel Quan, Stephen D. Brown | 2015-09-01 |
| 8589838 | M/A for performing incremental compilation using top-down and bottom-up design approaches | Andrew Leaver, David Karchmer, Gabriel Quan, Stephen D. Brown | 2013-11-19 |
| 8589849 | Method and apparatus for implementing soft constraints in tools used for designing programmable logic devices | Gabriel Quan, Stephen D. Brown, Deshanand Singh, Chris G. Sanford, Vaughn Betz +2 more | 2013-11-19 |
| 8370776 | Method and apparatus for compiling intellectual property systems design cores using an incremental compile design flow | Kevin Chan | 2013-02-05 |
| 8250505 | Method and apparatus for performing incremental compilation using top-down and bottom-up design approaches | Andrew Leaver, David Karchmer, Gabriel Quan, Stephen D. Brown | 2012-08-21 |
| 8037435 | Directed design space exploration | Ian Chesal | 2011-10-11 |
| 7669157 | Method and apparatus for performing incremental compilation using top-down and bottom-up design approaches | Andrew Leaver, David Karchmer, Gabriel Quan, Stephen D. Brown | 2010-02-23 |
| 7594204 | Method and apparatus for performing layout-driven optimizations on field programmable gate arrays | Deshanand Singh, Paul McHardy, Chris G. Sanford, Gabriel Quan, Ian Chesal +3 more | 2009-09-22 |
| 7594208 | Techniques for automated sweeping of parameters in computer-aided design to achieve optimum performance and resource usage | Ian Chesal, James Schleicher, David W. Mendel, Mike Hutton, Boris Ratchev +7 more | 2009-09-22 |
| 7464362 | Method and apparatus for performing incremental compilation | David Karchmer, Jason Govig, Andrew Leaver, Gabriel Quan, Kevin Chan +2 more | 2008-12-09 |
| 7401314 | Method and apparatus for performing compound duplication of components on field programmable gate arrays | Karl Schabas, Stephen D. Brown, Deshanand Singh, Shawn Malhotra | 2008-07-15 |
| 7389489 | Techniques for editing circuit design files to be compatible with a new programmable IC | Ian Chesal, Kevin Chan, Subianto Windoro, Minh V. Mac, Stephen D. Brown +2 more | 2008-06-17 |
| 7370295 | Directed design space exploration | Ian Chesal | 2008-05-06 |
| 7360190 | Method and apparatus for performing retiming on field programmable gate arrays | Deshanand Singh, Gabriel Quan, Ian Chesal, Valavan Manohararajah, Karl Schabas +1 more | 2008-04-15 |
| 7290240 | Leveraging combinations of synthesis, placement and incremental optimizations | Carolyn Lam-Leventis, Deshanand Singh | 2007-10-30 |
| 7257800 | Method and apparatus for performing logic replication in field programmable gate arrays | Deshanand Singh, Gabriel Quan, Valavan Manohararajah, Paul McHardy, Ivan Hamer +2 more | 2007-08-14 |
| 7254801 | Synthesis aware placement: a novel approach that combines knowledge of possible resynthesis | Deshanand Singh, Stephen D. Brown | 2007-08-07 |
| 7197734 | Method and apparatus for designing systems using logic regions | Deshanand Singh, Steven Caranci, Tim Vanderhoek, Ivan Hamer, Jimmy Kuo +5 more | 2007-03-27 |
| 7194720 | Method and apparatus for implementing soft constraints in tools used for designing systems on programmable logic devices | Gabriel Quan, Stephen D. Brown, Deshanand Singh, Chris G. Sanford, Vaughn Betz +2 more | 2007-03-20 |
| 7181717 | Method and apparatus for placement of components onto programmable logic devices | Deshanand Singh, Stephen D. Brown, Chris G. Sanford, Gabriel Quan | 2007-02-20 |
| 7181703 | Techniques for automated sweeping of parameters in computer-aided design to achieve optimum performance and resource usage | Ian Chesal, James Schleicher, David W. Mendel, Mike Hutton, Boris Ratchev +7 more | 2007-02-20 |
| 6779169 | Method and apparatus for placement of components onto programmable logic devices | Deshanand Singh, Stephen D. Brown, Chris G. Sanford, Gabriel Quan | 2004-08-17 |