VB

Vaughn Betz

IN Intel: 101 patents #201 of 30,777Top 1%
UN Unknown: 6 patents #2,010 of 83,584Top 3%
GT Governing Council Of The University Of Toronto: 1 patents #286 of 760Top 40%
Overall (All Time): #13,754 of 4,157,543Top 1%
103
Patents All Time

Issued Patents All Time

Showing 25 most recent of 103 patents

Patent #TitleCo-InventorsDate
11755810 Method and apparatus for performing parallel routing using a multi-threaded routing procedure Jordan Swartz, Vadim Gouterman 2023-09-12
11018668 Characterization of power delivery network in field programmable gate arrays or digital integrated circuits Shuze Zhao, Olivier Trescases, Ibrahim Ahmed 2021-05-25
10783310 Method and apparatus for performing parallel routing using a multi-threaded routing procedure Jordan Swartz, Vadim Gouterman 2020-09-22
10417362 Method and apparatus for deriving signal activities for power analysis and optimization David Neto, Jennifer Farrugia, Meghal Varia 2019-09-17
10242146 Method and apparatus for placing and routing partial reconfiguration modules David Samuel Goldman, Mark Bourgeault, Alan L. Herrmann 2019-03-26
10140411 Method and apparatus for performing parallel routing using a multi-threaded routing procedure Jordan Swartz, Vadim Gouterman 2018-11-27
9754065 Method and apparatus for implementing soft constraints in tools used for designing programmable logic devices Terry Borer, Gabriel Quan, Stephen D. Brown, Deshanand Singh, Chris G. Sanford +2 more 2017-09-05
9594859 Apparatus and associated methods for parallelizing clustering and placement Ketan Padalia, Adrian Ludwin, Ryan Fung 2017-03-14
9536034 Method and apparatus for performing parallel routing using a multi-threaded routing procedure Jordan Swartz, Vadim Gouterman 2017-01-03
9443054 Method and apparatus for utilizing constraints for the routing of a design on a programmable logic device Caroline Pantofaru, Jordan Swartz 2016-09-13
9361421 Method and apparatus for placing and routing partial reconfiguration modules David Samuel Goldman, Mark Bourgeault, Alan L. Herrmann 2016-06-07
9342640 Method and apparatus for protecting, optimizing, and reporting synchronizers Ryan Fung, David Neto 2016-05-17
9330733 Power-aware RAM processing Russell George Tessier, Thiagaraja Golpalsamy, David Neto 2016-05-03
9094014 PLD architecture for flexible placement of IP function blocks Andy L. Lee, Cameron McClintock, Brian Johnson, Richard G. Cliff, Srinivas T. Reddy +3 more 2015-07-28
8935650 Method and apparatus for performing parallel routing using a multi-threaded routing procedure Jordan Swartz, Vadim Gouterman 2015-01-13
8898603 Method and apparatus for deriving signal activities for power analysis and optimization David Neto, Jennifer Farrugia, Meghal Varia 2014-11-25
8745566 Method and apparatus for utilizing constraints for the routing of a design on a programmable logic device Caroline Pantofaru, Jordan Swartz 2014-06-03
8739105 Method and apparatus for performing parallel routing using a multi-threaded routing procedure Jordan Swartz, Vadim Gouterman 2014-05-27
8732635 Apparatus and methods for power management in integrated circuits David Lewis, Christopher F. Lane, Sarathy Sribhashyam, Srinivas Perisetty, Tim Vanderhoek +2 more 2014-05-20
8732646 PLD architecture for flexible placement of IP function blocks Andy L. Lee, Cameron McClintock, Brian Johnson, Richard G. Cliff, Srinivas T. Reddy +3 more 2014-05-20
8732639 Method and apparatus for protecting, optimizing, and reporting synchronizers Ryan Fung, David Neto 2014-05-20
8671377 Method and apparatus for placement and routing of partial reconfiguration modules David Samuel Goldman, Mark Bourgeault, Alan L. Herrmann 2014-03-11
8589849 Method and apparatus for implementing soft constraints in tools used for designing programmable logic devices Terry Borer, Gabriel Quan, Stephen D. Brown, Deshanand Singh, Chris G. Sanford +2 more 2013-11-19
8572530 Method and apparatus for performing path-level skew optimization and analysis for a logic design Ryan Fung, David Karchmer 2013-10-29
8533652 Method and apparatus for performing parallel routing using a multi-threaded routing procedure Jordan Swartz, Vadim Gouterman 2013-09-10