SS

Sarathy Sribhashyam

SG S3 Group: 5 patents #4 of 130Top 4%
IN Intel: 3 patents #10,349 of 30,777Top 35%
📍 Sunnyvale, CA: #3,068 of 14,302 inventorsTop 25%
🗺 California: #66,801 of 386,348 inventorsTop 20%
Overall (All Time): #576,692 of 4,157,543Top 15%
9
Patents All Time

Issued Patents All Time

Showing 1–9 of 9 patents

Patent #TitleCo-InventorsDate
8732635 Apparatus and methods for power management in integrated circuits David Lewis, Christopher F. Lane, Srinivas Perisetty, Tim Vanderhoek, Vaughn Betz +2 more 2014-05-20
7405589 Apparatus and methods for power management in integrated circuits David Lewis, Christopher F. Lane, Srinivas Perisetty, Tim Vanderhoek, Vaughn Betz +2 more 2008-07-29
7317340 Glitch free reset circuit David Hoff, Ken-Ming Li 2008-01-08
6393600 Skew-independent memory architecture David Hoff, Nalini Ranjan 2002-05-21
6356509 System and method for efficiently implementing a double data rate memory architecture Saleh Abdel-Hafeez 2002-03-12
6208167 Voltage tolerant buffer Nalini Ranjan 2001-03-27
5973511 Voltage tolerant input/output buffer Yuwen Hsia 1999-10-26
5907249 Voltage tolerant input/output buffer Yuwen Hsia 1999-05-25
5903180 Voltage tolerant bus hold latch Yuwen Hsia 1999-05-11