Issued Patents All Time
Showing 25 most recent of 33 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11665031 | Tuning analog front end response for jitter tolerance margins | Jayabharath Reddy Madi Reddy, Suresh Nagula, Philip Michael Chopp | 2023-05-30 |
| 10200037 | Apparatus and methods for on-die temperature sensing to improve FPGA performance | — | 2019-02-05 |
| 9735779 | Apparatus and methods for on-die temperature sensing to improve FPGA performance | — | 2017-08-15 |
| 9496268 | Integrated circuits with asymmetric and stacked transistors | Jun Liu, Yanzhong Xu, Shankar Sinha, Shih-Lin Lee, Jeffrey Tung +5 more | 2016-11-15 |
| 8750026 | Integrated circuits with asymmetric and stacked transistors | Jun Liu, Yanzhong Xu, Shankar Sinha, Shih-Lin Lee, Jeffrey Tung +5 more | 2014-06-10 |
| 8732635 | Apparatus and methods for power management in integrated circuits | David Lewis, Christopher F. Lane, Sarathy Sribhashyam, Tim Vanderhoek, Vaughn Betz +2 more | 2014-05-20 |
| 8711614 | Memory elements with increased write margin and soft error upset immunity | Andy L. Lee, Irfan Rahim, Lu Zhou, Madhuri Mailavaram | 2014-04-29 |
| 8618786 | Self-biased voltage regulation circuitry for memory | Arvind Sherigar | 2013-12-31 |
| 8482963 | Integrated circuits with asymmetric and stacked transistors | Jun Liu, Yanzhong Xu, Shankar Sinha, Shih-Lin Lee, Jeffrey Tung +5 more | 2013-07-09 |
| 8369175 | Memory elements with voltage overstress protection | Lin-Shih Liu, Andy L. Lee, Ping-Chen Liu, Irfan Rahim | 2013-02-05 |
| 8279660 | Static random-access memory with boosted voltages | — | 2012-10-02 |
| 8099704 | Performance improvements in an integrated circuit by selectively applying forward bias voltages | — | 2012-01-17 |
| 7990664 | Electrostatic discharge protection in a field programmable gate array | Antonio Gallerano, Jeffrey T. Watt, Cheng-Hsiung Huang | 2011-08-02 |
| 7978450 | Electrostatic discharge protection circuitry | — | 2011-07-12 |
| 7957177 | Static random-access memory with boosted voltages | — | 2011-06-07 |
| 7920410 | Memory elements with increased write margin and soft error upset immunity | Andy L. Lee, Irfan Rahim, Lu Zhou, Madhuri Mailavaram | 2011-04-05 |
| 7863968 | Variable-output current-load-independent negative-voltage regulator | — | 2011-01-04 |
| 7782581 | Method and apparatus for providing electrostatic discharge protection for a polysilicon fuse | — | 2010-08-24 |
| 7675317 | Integrated circuits with adjustable body bias and power supply circuitry | — | 2010-03-09 |
| 7639067 | Integrated circuit voltage regulator | — | 2009-12-29 |
| 7639041 | Hotsocket-compatible body bias circuitry with power-up current reduction capabilities | — | 2009-12-29 |
| 7629831 | Booster circuit with capacitor protection circuitry | Jeffery Chow | 2009-12-08 |
| 7592832 | Adjustable transistor body bias circuitry | — | 2009-09-22 |
| 7571413 | Testing circuitry for programmable logic devices with selectable power supply voltages | Jayabrata Ghosh Dastidar, Andy L. Lee | 2009-08-04 |
| 7514953 | Adjustable transistor body bias generation circuitry with latch-up prevention | — | 2009-04-07 |