Issued Patents All Time
Showing 26–48 of 48 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7584447 | PLD architecture for flexible placement of IP function blocks | Andy L. Lee, Cameron McClintock, Brian Johnson, Richard G. Cliff, Srinivas T. Reddy +3 more | 2009-09-01 |
| 7432734 | Versatile logic element and logic array block | David Lewis, Andy L. Lee, Henry Kim, Bruce B. Pedersen, Chris Wysocki +4 more | 2008-10-07 |
| 7400167 | Apparatus and methods for optimizing the performance of programmable logic devices | David Lewis, Vaughn Betz, Christopher F. Lane, Andy L. Lee, Jeffrey T. Watt +1 more | 2008-07-15 |
| 7391236 | Distributed memory in field-programmable gate array integrated circuit devices | David Lewis, Vaughn Betz, Thomas Yau-Tsun Wong, Andy L. Lee, Philip Pan | 2008-06-24 |
| 7304499 | Distributed random access memory in a programmable logic device | David Lewis, Vaughn Betz | 2007-12-04 |
| 7253660 | Multiplexing device including a hardwired multiplexer in a programmable logic device | Bruce B. Pedersen, Chris Lane, Srinivas T. Reddy, David Lewis | 2007-08-07 |
| 7236633 | Data compression and decompression techniques for programmable circuits | David Lewis | 2007-06-26 |
| 7218133 | Versatile logic element and logic array block | David Lewis, Andy L. Lee, Henry Kim, Bruce B. Pedersen, Chris Wysocki +4 more | 2007-05-15 |
| 7185306 | Method and apparatus for enhancing signal routability | David Cashman | 2007-02-27 |
| 7180324 | Redundancy structures and methods in a programmable logic device | Michael Chan, David Lewis, Ketan Zaveri, Hyun Yi, Chris Lane | 2007-02-20 |
| 7132852 | Routing architecture with high speed I/O bypass path | William Bradley Vest | 2006-11-07 |
| 7098687 | Flexible routing resources in a programmable logic device | David Lewis | 2006-08-29 |
| 7084665 | Distributed random access memory in a programmable logic device | David Lewis, Vaughn Betz | 2006-08-01 |
| 7058920 | Methods for designing PLD architectures for flexible placement of IP function blocks | Andy L. Lee, Cameron McClintock, Brian Johnson, Richard G. Cliff, Srinivas T. Reddy +3 more | 2006-06-06 |
| 6970014 | Routing architecture for a programmable logic device | David Lewis, Andy L. Lee, Brian Johnson, Richard G. Cliff, Srinivas T. Reddy +5 more | 2005-11-29 |
| 6965249 | Programmable logic device with redundant circuitry | Christopher F. Lane, Ketan Zaveri, Hyun Yi, Giles V. Powell, David Jefferson +7 more | 2005-11-15 |
| 6937064 | Versatile logic element and logic array block | David Lewis, Andy L. Lee, Henry Kim, Bruce B. Pedersen, Chris Wysocki +4 more | 2005-08-30 |
| 6895570 | System and method for optimizing routing lines in a programmable logic device | David Lewis, Vaughn Betz, Michael Chan, Cameron McClintock, Andy L. Lee +3 more | 2005-05-17 |
| 6859065 | Use of dangling partial lines for interfacing in a PLD | Brian Johnson, Andy L. Lee, Cameron McClintock, Giles V. Powell | 2005-02-22 |
| 6826741 | Flexible I/O routing resources | Brian Johnson, Andy L. Lee, Cameron McClintock, Triet Nguyen, David Jefferson +3 more | 2004-11-30 |
| 6653862 | Use of dangling partial lines for interfacing in a PLD | Brian Johnson, Andy L. Lee, Cameron McClintock, Giles V. Powell | 2003-11-25 |
| 6630842 | Routing architecture for a programmable logic device | David Lewis, Andy L. Lee, Brian Johnson, Richard G. Cliff, Srinivas T. Reddy +5 more | 2003-10-07 |
| 6605962 | PLD architecture for flexible placement of IP function blocks | Andy L. Lee, Cameron McClintock, Brian Johnson, Richard G. Cliff, Srinivas T. Reddy +3 more | 2003-08-12 |