Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12332875 | Nested array batch processing | Shoumik Palkar, Alexander Behm | 2025-06-17 |
| 9658830 | Structures for LUT-based arithmetic in PLDs | Ketan Padalia, David Lewis, Andy L. Lee, Jay Schleicher, Jinyong Yuan +1 more | 2017-05-23 |
| 9030227 | Methods and apparatus for providing redundancy on multi-chip devices | — | 2015-05-12 |
| 8860460 | Programmable integrated circuits with redundant circuitry | — | 2014-10-14 |
| 8788550 | Structures for LUT-based arithmetic in PLDs | Ketan Padalia, David Lewis, Andy L. Lee, Jay Schleicher, Jinyong Yuan +1 more | 2014-07-22 |
| 8581624 | Integrated circuits with multi-stage logic regions | David Lewis, Valavan Manohararajah | 2013-11-12 |
| 8427213 | Robust time borrowing pulse latches | David Lewis, Jeffrey Christopher Chromczak | 2013-04-23 |
| 8242806 | Methods and systems for managing a write operation | David Lewis, Lu Zhou | 2012-08-14 |
| 8222921 | Configurable time borrowing flip-flops | David Lewis | 2012-07-17 |
| 8115530 | Robust time borrowing pulse latches | David Lewis, Jeffrey Christopher Chromczak | 2012-02-14 |
| 7872512 | Robust time borrowing pulse latches | David Lewis, Jeffrey Christopher Chromczak | 2011-01-18 |
| 7868655 | Configurable time borrowing flip-flops | David Lewis | 2011-01-11 |
| 7724031 | Staggered logic array block architecture | — | 2010-05-25 |
| 7716623 | Programmable logic device architectures and methods for implementing logic in those architectures | Tim Vanderhoek, Vaughn Betz, David Lewis, Michael D. Hutton | 2010-05-11 |
| 7619443 | Programmable logic device architectures and methods for implementing logic in those architectures | Tim Vanderhoek, Vaughn Betz, David Lewis, Michael D. Hutton | 2009-11-17 |
| 7583103 | Configurable time borrowing flip-flops | David Lewis | 2009-09-01 |
| 7579866 | Programmable logic device with configurable override of region-wide signals | Michael D. Hutton, Jinyoung Yuan, Kimberly Bozman | 2009-08-25 |
| 7558812 | Structures for LUT-based arithmetic in PLDs | Ketan Padalia, David Lewis, Andy L. Lee, Jay Schleicher, Jinyong Yuan +1 more | 2009-07-07 |
| 7508231 | Programmable logic device having redundancy with logic element granularity | David Lewis | 2009-03-24 |
| 7456653 | Programmable logic device having logic array block interconnect lines that can interconnect logic elements in different logic blocks | David Lewis | 2008-11-25 |
| 7268584 | Adder circuitry for a programmable logic device | David Lewis, Gregg William Baeckler, Ketan Padalia | 2007-09-11 |
| 7185306 | Method and apparatus for enhancing signal routability | Paul Leventis | 2007-02-27 |
| 6965249 | Programmable logic device with redundant circuitry | Christopher F. Lane, Ketan Zaveri, Hyun Yi, Giles V. Powell, Paul Leventis +7 more | 2005-11-15 |