{"@context": "https://schema.org", "@type": "BreadcrumbList", "itemListElement": [{"@type": "ListItem", "position": 1, "name": "Home", "item": "https://www.patentleaderboard.com/"}, {"@type": "ListItem", "position": 2, "name": "Methods and apparatus for providing redundancy on multi-chip devices", "item": "https://www.patentleaderboard.com/patent/9030227"}]}
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Home › Methods and apparatus for providing redundancy on multi-chip devices

Methods and apparatus for providing redundancy on multi-chip devices

US Patent 9030227 · Granted May 12, 2015

Estimated economic value: $15,740,000 ⓘ

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