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Programmable device implementing fixed and floating point functionality in a mixed architecture |
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Programmable device implementing fixed and floating point functionality in a mixed architecture |
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Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitry |
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Digital signal processing circuit blocks with support for systolic finite-impulse-response digital filtering |
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2013-11-19 |
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Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitry |
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Digital signal processing circuit blocks with support for systolic finite-impulse-response digital filtering |
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2013-06-04 |
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Michael Chan, Paul Leventis, David Lewis, Ketan Zaveri, Chris Lane |
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2011-08-16 |
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Techniques for providing calibrated on-chip termination impedance |
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2011-02-08 |
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2010-05-18 |
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2009-04-14 |
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2008-10-28 |
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2008-09-09 |
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2008-06-24 |
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Method of reducing leakage current using sleep transistors in programmable logic device |
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2008-04-08 |
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