Issued Patents All Time
Showing 25 most recent of 263 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12340219 | FPGA specialist processing block for machine learning | Dongdong Chen, Jason R. Bergendahl | 2025-06-24 |
| 12254316 | Vector processor architectures | Eriko Nurvitadhi, Gregg William Baeckler | 2025-03-18 |
| 12197888 | Rank-based dot product circuitry | — | 2025-01-14 |
| 12182534 | High precision decomposable DSP entity | — | 2024-12-31 |
| 12135955 | Systems and methods for low latency modular multiplication | Bogdan Pasca | 2024-11-05 |
| 12086518 | Programmable integrated circuit underlay | Gregg William Baeckler | 2024-09-10 |
| 12079590 | Efficient dual-path floating-point arithmetic operators | Theo Alan Drane | 2024-09-03 |
| 12056461 | Integrated circuits with machine learning extensions | Dongdong Chen | 2024-08-06 |
| 12045581 | Floating-point dynamic range expansion | Bogdan Pasca | 2024-07-23 |
| 12020000 | Rounding circuitry for floating-point mantissas | Alexander Heinecke | 2024-06-25 |
| 11960853 | Folded integer multiplication for field-programmable gate arrays | Bogdan Pasca | 2024-04-16 |
| 11907719 | FPGA specialist processing block for machine learning | Dongdong Chen, Jason R. Bergendahl | 2024-02-20 |
| 11899746 | Circuitry for high-bandwidth, low-latency machine learning | Andrei-Mihai Hagiescu-Miriste | 2024-02-13 |
| 11809798 | Implementing large multipliers in tensor arrays | Simon Finn | 2023-11-07 |
| 11797473 | Accelerator architecture on a programmable platform | David Shippy, Jeffrey R. Eastlack | 2023-10-24 |
| 11789641 | Three dimensional circuit systems and methods having memory hierarchies | Scott J. Weber, Jawad B. Khan, Ilya K. Ganusov, Matthew J. Adiletta, Terence J. Magee +5 more | 2023-10-17 |
| 11726744 | Integrated circuits with machine learning extensions | Dongdong Chen, Kevin A. Hurd | 2023-08-15 |
| 11662979 | Adder circuitry for very large integers | — | 2023-05-30 |
| 11656872 | Systems and methods for loading weights into a tensor processing block | — | 2023-05-23 |
| 11556692 | High performance regularized network-on-chip architecture | Gregg William Baeckler, Sergey Gribok | 2023-01-17 |
| 11520584 | FPGA specialist processing block for machine learning | Dongdong Chen, Jason R. Bergendahl | 2022-12-06 |
| 11494186 | FPGA specialist processing block for machine learning | Dongdong Chen, Jason R. Bergendahl | 2022-11-08 |
| 11467804 | Geometric synthesis | Sergey Gribok, Gregg William Baeckler | 2022-10-11 |
| 11436399 | Method and apparatus for performing multiplier regularization | Sergey Gribok, Gregg William Baeckler | 2022-09-06 |
| 11334318 | Prefix network-directed addition | Bogdan Pasca, Sergey Gribok | 2022-05-17 |