Issued Patents All Time
Showing 1–25 of 39 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12353808 | Apparatus, device, method, and computer program for generating a register transfer level representation of a circuit | Samuel Coward, George CONSTANTINIDES | 2025-07-08 |
| 12353862 | Automatic code generation of optimized RTL via redundant code removal | Emiliano Morini, Jordan Schmerge, Samuel Coward | 2025-07-08 |
| 12169700 | Method and apparatus for use in the design and manufacture of integrated circuits | Wai-Chuen Cheung | 2024-12-17 |
| 12141548 | Trailing or leading digit anticipator | Freddie Rupert Exall, Joe Buckingham | 2024-11-12 |
| 12079590 | Efficient dual-path floating-point arithmetic operators | Martin Langhammer | 2024-09-03 |
| 11861323 | Partially and fully parallel normaliser | — | 2024-01-02 |
| 11836460 | Error bounded multiplication by invariant rationals | — | 2023-12-05 |
| 11809795 | Implementing fixed-point polynomials in hardware logic | — | 2023-11-07 |
| 11748060 | Method and apparatus for use in the design and manufacture of integrated circuits | Wai-Chuen Cheung | 2023-09-05 |
| 11669305 | Trailing or leading digit anticipator | Freddie Rupert Exall, Joe Buckingham | 2023-06-06 |
| 11010515 | Implementing fixed-point polynomials in hardware logic | — | 2021-05-18 |
| 10977000 | Partially and fully parallel normaliser | — | 2021-04-13 |
| 10949167 | Error bounded multiplication by invariant rationals | — | 2021-03-16 |
| 10949169 | Trailing or leading digit anticipator | Freddie Rupert Exall, Joe Buckingham | 2021-03-16 |
| 10698655 | Partially and fully parallel normaliser | — | 2020-06-30 |
| 10698660 | Trailing or leading digit anticipator | Freddie Rupert Exall, Joe Buckingham | 2020-06-30 |
| 10606558 | Error bounded multiplication by invariant rationals | — | 2020-03-31 |
| 10540141 | Method and apparatus for use in the design and manufacture of integrated circuits | Wai-Chuen Cheung | 2020-01-21 |
| 10346137 | Trailing or leading digit anticipator | Freddie Rupert Exall, Joe Buckingham | 2019-07-09 |
| 10331405 | Evaluating polynomials in hardware logic | — | 2019-06-25 |
| 10310816 | Error bounded multiplication by invariant rationals | — | 2019-06-04 |
| 10296293 | Low-area fixed-point polynomials | — | 2019-05-21 |
| 10223068 | Partially and fully parallel normaliser | — | 2019-03-05 |
| 10185545 | Trailing or leading zero counter having parallel and combinational logic | Freddie Rupert Exall | 2019-01-22 |
| 10175943 | Sorting numbers in hardware | Thomas Rose | 2019-01-08 |