Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8866304 | Integrated circuit device with stitched interposer | Arifur Rahman | 2014-10-21 |
| 8812755 | Heterogeneous high-speed serial interface system with phase-locked loop architecture and clock distribution system | Surinder Singh, Henry Y. Lui, Arch Zaliznyak | 2014-08-19 |
| 8751551 | Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitry | Keone Streicher, Martin Langhammer, Yi-Wen Lin, David Lewis, Volker Mauer +3 more | 2014-06-10 |
| 8700825 | Heterogeneous high-speed serial interface system with phase-locked loop architecture and clock distribution system | Surinder Singh, Henry Y. Lui, Arch Zaliznyak | 2014-04-15 |
| 8620977 | Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitry | Keone Streicher, Martin Langhammer, Yi-Wen Lin, David Lewis, Volker Mauer +3 more | 2013-12-31 |
| 8549055 | Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitry | Keone Streicher, Martin Langhammer, Yi-Wen Lin, David Lewis, Volker Mauer +3 more | 2013-10-01 |
| 8307023 | DSP block for implementing large multiplier on a programmable integrated circuit device | Henry Y. Lui | 2012-11-06 |
| 7532646 | Distributed multiple-channel alignment scheme | Barry Britton, Akila Subramaniam | 2009-05-12 |
| 6216191 | Field programmable gate array having a dedicated processor interface | Barry Britton, Alan Cunningham, Richard G. Stuby, Jr., James A. Thompson | 2001-04-10 |
| 6060902 | Programmable clock manager for a programmable logic device that can be programmed without reconfiguring the device | Lucian Remus Albu, Barry Britton, Richard G. Stuby, Jr., James A. Thompson, Zeljko Zilic | 2000-05-09 |
| 6043677 | Programmable clock manager for a programmable logic device that can implement delay-locked loop functions | Lucian Remus Albu, Barry Britton, Richard G. Stuby, Jr., James A. Thompson, Zeljko Zilic | 2000-03-28 |
| 6028463 | Programmable clock manager for a programmable logic device that can generate at least two different output clocks | Lucian Remus Albu, Barry Britton, Richard G. Stuby, Jr., James A. Thompson, Zeljko Zilic | 2000-02-22 |
| 5457408 | Method and apparatus for verifying whether a bitstream received by a field programmable gate array (FPGA) is intended for that FPGA | — | 1995-10-10 |
| 5394031 | Apparatus and method to improve programming speed of field programmable gate arrays | Barry Britton | 1995-02-28 |
| 5386156 | Programmable function unit with programmable fast ripple logic | Barry Britton | 1995-01-31 |