Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9230112 | Secured booting of a field programmable system-on-chip including authentication of a first stage boot loader to mitigate against differential power analysis | Edward S. Peterson, Roger D. Flateau, Jr., James D. Wesselkamper, Steven E. McNeil, Jason J. Moore +2 more | 2016-01-05 |
| 9165143 | Image file generation and loading | Lester S. Sanders, Yatharth K. Kochar, Steven E. McNeil, Jason J. Moore, Roger D. Flateau, Jr. | 2015-10-20 |
| 6525562 | Programmable logic device capable of preserving state data during partial or complete reconfiguration | David P. Schultz, F. Erich Goetting | 2003-02-25 |
| 6507211 | Programmable logic device capable of preserving user data during partial or complete reconfiguration | David P. Schultz, F. Erich Goetting | 2003-01-14 |
| 6429715 | Deskewing clock signals for off-chip devices | Shekhar Bapat | 2002-08-06 |
| 6429682 | Configuration bus interface circuit for FPGAs | David P. Schultz, F. Erich Goetting | 2002-08-06 |
| 6262596 | Configuration bus interface circuit for FPGAS | David P. Schultz, F. Erich Goetting | 2001-07-17 |
| 6255848 | Method and structure for reading, modifying and writing selected configuration memory cells of an FPGA | David P. Schultz, Steven P. Young | 2001-07-03 |
| 6204687 | Method and structure for configuring FPGAS | David P. Schultz, F. Erich Goetting | 2001-03-20 |
| 6191614 | FPGA configuration circuit including bus-based CRC register | David P. Schultz, F. Erich Goetting | 2001-02-20 |
| 6191613 | Programmable logic device with delay-locked loop | David P. Schultz, F. Erich Goetting | 2001-02-20 |
| 5838167 | Method and structure for loading data into several IC devices | Charles R. Erickson | 1998-11-17 |
| 5781756 | Programmable logic device with partially configurable memory cells and a method for configuration | — | 1998-07-14 |
| 5640106 | Method and structure for loading data into several IC devices | Charles R. Erickson | 1997-06-17 |
| 5430687 | Programmable logic device including a parallel input device for loading memory cells | Charles R. Erickson | 1995-07-04 |