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USPTO Patent Rankings Data through Dec 31, 2025
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Lawrence C. Hung — 15 Patents

AMD: 15 patents #766 of 9,280Top 9%
San Jose, CA: #4,373 of 32,062 inventorsTop 15%
California: #40,789 of 386,348 inventorsTop 15%
Overall (All Time): #307,048 of 4,157,543Top 8%
15 Patents All Time
Lawrence C. Hung has been granted 15 US patents while listed as an inventor at AMD. The first was granted in 1995 and the most recent in January 2016. Lawrence C. Hung ranks #307,048 of 4,157,543 US inventors in our database (top 7.4%). Patent records list Lawrence C. Hung in San Jose, CA, US.

Issued Patents All Time

Showing 1–15 of 15 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
9230112 Secured booting of a field programmable system-on-chip including authentication of a first stage boot loader to mitigate against differential power analysis Edward S. Peterson, Roger D. Flateau, Jr., James D. Wesselkamper, Steven E. McNeil, Jason J. Moore +2 more 2016-01-05 $25,704,000
9165143 Image file generation and loading Lester S. Sanders, Yatharth K. Kochar, Steven E. McNeil, Jason J. Moore, Roger D. Flateau, Jr. 2015-10-20 $19,138,000
6525562 Programmable logic device capable of preserving state data during partial or complete reconfiguration David P. Schultz, F. Erich Goetting 2003-02-25 $13,505,000
6507211 Programmable logic device capable of preserving user data during partial or complete reconfiguration David P. Schultz, F. Erich Goetting 2003-01-14 $17,679,000
6429682 Configuration bus interface circuit for FPGAs David P. Schultz, F. Erich Goetting 2002-08-06 $14,655,000
6429715 Deskewing clock signals for off-chip devices Shekhar Bapat 2002-08-06 $14,655,000
6262596 Configuration bus interface circuit for FPGAS David P. Schultz, F. Erich Goetting 2001-07-17 $82,873,000
6255848 Method and structure for reading, modifying and writing selected configuration memory cells of an FPGA David P. Schultz, Steven P. Young 2001-07-03 $63,988,000
6204687 Method and structure for configuring FPGAS David P. Schultz, F. Erich Goetting 2001-03-20 $36,747,000
6191614 FPGA configuration circuit including bus-based CRC register David P. Schultz, F. Erich Goetting 2001-02-20 $71,785,000
6191613 Programmable logic device with delay-locked loop David P. Schultz, F. Erich Goetting 2001-02-20 $71,785,000
5838167 Method and structure for loading data into several IC devices Charles R. Erickson 1998-11-17 $17,149,000
5781756 Programmable logic device with partially configurable memory cells and a method for configuration 1998-07-14 $42,486,000
5640106 Method and structure for loading data into several IC devices Charles R. Erickson 1997-06-17 $47,552,000
5430687 Programmable logic device including a parallel input device for loading memory cells Charles R. Erickson 1995-07-04