Issued Patents All Time
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12045469 | Single event upset tolerant memory device | Kumar Rahul, John Wuu, Santosh Yachareni, Cheang-Whang Chang | 2024-07-23 |
| 11650249 | Wafer testing and structures for wafer testing | Yan Wang | 2023-05-16 |
| 11585854 | Runtime measurement of process variations and supply voltage characteristics | Da-Qing Cheng, Amitava Majumdar, Ping-Chin Yeh, Cheang-Whang Chang | 2023-02-21 |
| 11164749 | Warpage reduction | Hui-Wen Lin | 2021-11-02 |
| 11119146 | Testing of bonded wafers and structures for testing bonded wafers | Yan Wang, Hui-Wen Lin | 2021-09-14 |
| 11114344 | IC die with dummy structures | Hui-Wen Lin, Myongseob Kim, Henley Liu, Ping-Chin Yeh, Cheang-Whang Chang | 2021-09-07 |
| 11054461 | Test circuits for testing a die stack | Amitava Majumdar, Cheang-Whang Chang, Henley Liu, Myongseob Kim, Albert Shih-Huai Lin | 2021-07-06 |
| 10756711 | Integrated circuit skew determination | Amitava Majumdar | 2020-08-25 |
| 10692837 | Chip package assembly with modular core dice | Myongseob Kim, Henley Liu, Cheang-Whang Chang | 2020-06-23 |
| 10629512 | Integrated circuit die with in-chip heat sink | Hong-Tsz Pan, Jonathan Chang, Henley Liu, Gamal Refai-Ahmed, Suresh Ramalingam | 2020-04-21 |
| 10566050 | Selectively disconnecting a memory cell from a power supply | Shidong Zhou, Jing Jing Chen | 2020-02-18 |
| 10379155 | In-die transistor characterization in an IC | Ping-Chin Yeh, John K. Jennings, Rhesa Nathanael, Cheang-Whang Chang, Daniel Chung | 2019-08-13 |
| 10103139 | Method and design of low sheet resistance MEOL resistors | Jae-Gyung Ahn, Ping-Chin Yeh, Cheang-Whang Chang | 2018-10-16 |
| 10043724 | Using an integrated circuit die for multiple devices | Brian C. Gaide | 2018-08-07 |
| 9177634 | Two gate pitch FPGA memory cell | Steven P. Young, Yang Hee Song | 2015-11-03 |
| 8194372 | Systems and methods for electrostatic discharge protection | Hong-Tsz Pan | 2012-06-05 |
| 8068004 | Embedded inductor | Hong-Tsz Pan | 2011-11-29 |
| 7673270 | Method and apparatus for compensating an integrated circuit layout for mechanical stress effects | Yan Wang, Hong-Tsz Pan, Bang-Thu Nguyen, Jonathan Ho, Qi Lin +4 more | 2010-03-02 |
| 7307319 | High-voltage protection device and process | Farrokh Omid-Zohoor | 2007-12-11 |
| 7024646 | Electrostatic discharge simulation | Stewart Logie, Farrokh Omid-Zohoor | 2006-04-04 |