JA

Jae-Gyung Ahn

AM AMD: 7 patents #1,662 of 9,279Top 20%
HE Hynix (Hyundai Electronics): 6 patents #93 of 1,604Top 6%
LC Lg Semicon Co.: 6 patents #35 of 547Top 7%
IT Integrated Device Technology: 4 patents #156 of 758Top 25%
SH Sk Hynix: 2 patents #2,373 of 4,849Top 50%
HC Hyundai Microelectronics Co.: 1 patents #5 of 28Top 20%
Overall (All Time): #154,833 of 4,157,543Top 4%
26
Patents All Time

Issued Patents All Time

Showing 25 most recent of 26 patents

Patent #TitleCo-InventorsDate
10103139 Method and design of low sheet resistance MEOL resistors Nui Chong, Ping-Chin Yeh, Cheang-Whang Chang 2018-10-16
8653844 Calibrating device performance within an integrated circuit Sharmin Sadoughi 2014-02-18
8354671 Integrated circuit with adaptive VGG setting Hsung Jai Im, Henley Liu, Tony Le, Patrick J. Crotty 2013-01-15
8350253 Integrated circuit with stress inserts Bei Zhu, Hong Pan, Bang-Thu Nguyen, Qi Lin, Zhiyuan Wu +2 more 2013-01-08
8329568 Semiconductor device and method for making the same Myongseob Kim, Ping-Chin Yeh, Zhiyuan Wu, John W. Cooksey 2012-12-11
7956385 Circuit for protecting a transistor during the manufacture of an integrated circuit device Yuhao Luo, Shuxian Wu, Xin Wu, Deepak Nayak, Daniel Gitlin 2011-06-07
7772093 Method of and circuit for protecting a transistor formed on a die Yuhao Luo, Shuxian Wu, Xin Wu, Deepak Nayak, Daniel Gitlin 2010-08-10
7419748 Photomask with reduced electrostatic discharge defects 2008-09-02
7388262 Nitrogen implementation to minimize device variation Youngtag Woo 2008-06-17
6846751 Nitrogen implementation to minimize device variation Young Woo 2005-01-25
6730572 Method of forming silicide Key-Min Lee 2004-05-04
6528381 Method of forming silicide Key-Min Lee 2003-03-04
6518135 Method for forming localized halo implant regions 2003-02-11
6373109 Semiconductor device to more precisely reflect the claimed invention 2002-04-16
6362060 Method for forming semiconductor device having a gate in the trench Jeong-Hwan Son 2002-03-26
6337254 Method of forming trench isolation structure with dummy active regions and overlying discriminately doped conduction layer 2002-01-08
6265114 Method of generating mask data in fabricating semiconductor devices 2001-07-24
6261910 Semiconductor device and method of manufacturing the same Jeong-Hwan Son 2001-07-17
6242311 Method of fabricating a semiconductor device with silicided gates and peripheral region 2001-06-05
6180473 Method for manufacturing semiconductor device Sung-Kwon Hong, Jeong-Hwan Son, Jeong-Mo Hwang 2001-01-30
6110771 Fabrication method of a semiconductor device using self-aligned silicide CMOS having a dummy gate electrode 2000-08-29
6096609 ESD protection circuit and method for fabricating same using a plurality of dummy gate electrodes as a salicide mask for a drain Young Gwan Kim, Myoung Goo Lee 2000-08-01
6077736 Method of fabricating a semiconductor device Hyun-Sang Hwang 2000-06-20
5953616 Method of fabricating a MOS device with a salicide structure 1999-09-14
5877532 Semiconductor device and method of manufacturing the same Jeong-Hwan Son 1999-03-02