| 12424580 |
Chip package with integrated off-die inductor |
Jing Jing |
2025-09-23 |
| 12073973 |
Opposite-facing interleaved transformer design |
Jing Jing |
2024-08-27 |
| 11043470 |
Inductor design in active 3D stacking technology |
Jing Jing, Xin Wu, Yohan Frans |
2021-06-22 |
| 10847604 |
Systems and methods for providing capacitor structures in an integrated circuit |
Jing Jing, Parag Upadhyaya |
2020-11-24 |
| 10756019 |
Systems providing interposer structures |
Xiaobao Wang, Xuemei Xi |
2020-08-25 |
| 9923051 |
Substrate noise isolation structures for semiconductor devices |
Jing Jing, Jane W. Sowards |
2018-03-20 |
| 9524964 |
Capacitor structure in an integrated circuit |
Jing Jing |
2016-12-20 |
| 9270247 |
High quality factor inductive and capacitive circuit structure |
Jing Jing, Zhaoyin D. Wu |
2016-02-23 |
| 8922309 |
Devices and methods for tuning an inductor |
Jing Jing |
2014-12-30 |
| 8878337 |
Integrated circuit structure having a capacitor structured to reduce dishing of metal layers |
Hong-Tsz Pan, Yun Wu, Qi Lin, Bang-Thu Nguyen |
2014-11-04 |
| 8860180 |
Inductor structure with a current return encompassing a coil |
Jing Jing, Parag Upadhyaya |
2014-10-14 |
| 8650020 |
Modeling second order effects for simulating transistor behavior |
Tao Yu |
2014-02-11 |
| 8427266 |
Integrated circuit inductor having a patterned ground shield |
Zhaoyin D. Wu, Parag Upadhyahya, Xuewen Jiang, Jing Jing |
2013-04-23 |
| 8224637 |
Method and apparatus for modeling transistors in an integrated circuit design |
Jane W. Sowards, Kaiman Chan |
2012-07-17 |
| 8150638 |
Predicting parasitic capacitance in schematic circuit simulations using sub-circuit modeling |
Tao Yu |
2012-04-03 |
| 7956385 |
Circuit for protecting a transistor during the manufacture of an integrated circuit device |
Yuhao Luo, Xin Wu, Jae-Gyung Ahn, Deepak Nayak, Daniel Gitlin |
2011-06-07 |
| 7932563 |
Techniques for improving transistor-to-transistor stress uniformity |
Jung-Ching J. Ho, Jane W. Sowards |
2011-04-26 |
| 7772093 |
Method of and circuit for protecting a transistor formed on a die |
Yuhao Luo, Xin Wu, Jae-Gyung Ahn, Deepak Nayak, Daniel Gitlin |
2010-08-10 |