Issued Patents All Time
Showing 25 most recent of 59 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12425107 | Methods and apparatuses for maximizing output modulation amplitude for optical wavelength division multiplexed micro-ring modulators | Adebabay M. Bekele, Mayank Raj, Chuan Xie, Sandeep Kumar, Zhaowen Wang +2 more | 2025-09-23 |
| 12072239 | Circuits and methods for wavelength locking of optical receiver WDM filters | Zhaowen Wang, Mayank Raj, Chuan Xie, Sandeep Kumar, Muqseed Mohammad +3 more | 2024-08-27 |
| 11984817 | Low power inverter-based CTLE | Junho Cho, Kevin Zheng | 2024-05-14 |
| 11735519 | In-package passive inductive element for reflection mitigation | Zhaoyin D. Wu, Hong Shi | 2023-08-22 |
| 11728962 | Multi-phase clock signal generation circuitry | Shaojun MA, Chi Fung Poon, Kevin Zheng | 2023-08-15 |
| 11721651 | Communication between integrated circuit (IC) dies in wafer-level fan-out package | Chi Fung Poon, Asma Laraba | 2023-08-08 |
| 11695397 | Offset circuitry and threshold reference circuitry for a capture flip-flop | Wenfeng Zhang | 2023-07-04 |
| 11689207 | Wide frequency range voltage controlled oscillators | Adebabay M. Bekele | 2023-06-27 |
| 11668874 | Optical filter having a tapered profile | Zhaoyin D. Wu, Chuan Xie, Mayank Raj | 2023-06-06 |
| 11637528 | Wide frequency range voltage controlled oscillators | Adebabay M. Bekele | 2023-04-25 |
| 11575497 | Reduced power and area efficient receiver circuitry | Wenfeng Zhang, Zhaoyin D. Wu | 2023-02-07 |
| 11469877 | High bandwidth CDR | Mayank Raj | 2022-10-11 |
| 11277144 | Analog-based DC offset compensation | Junho Cho | 2022-03-15 |
| 11190172 | Latch-based level shifter circuit with self-biasing | Mayank Raj | 2021-11-30 |
| 11108401 | Low noise quadrature signal generation | Jaewook Shin, Shaojun MA | 2021-08-31 |
| 11005572 | Temperature-locked loop for optical elements having a temperature-dependent response | Ping-Chuan Chiang, Mayank Raj, Chuan Xie, Stanley Y. Chen, Sandeep Kumar +2 more | 2021-05-11 |
| 11003203 | Circuits for and methods of calibrating a circuit in an integrated circuit device | Chi Fung Poon, Asma Laraba | 2021-05-11 |
| 10868663 | Flexible wide-range and high bandwidth auxiliary clock and data recovery (CDR) circuit for transceivers | Didem Z. Turker Melek, Mayank Raj, Adebabay M. Bekele, Yohan Frans | 2020-12-15 |
| 10847604 | Systems and methods for providing capacitor structures in an integrated circuit | Jing Jing, Shuxian Wu | 2020-11-24 |
| 10791009 | Continuous time linear equalization (CTLE) adaptation algorithm enabling baud-rate clock data recovery(CDR) locked to center of eye | Zhaoyin D. Wu | 2020-09-29 |
| 10749532 | Method and apparatus for a phase locked loop circuit | Mayank Raj, Didem Z. Turker Melek, Yohan Frans, Kun-Yung Chang | 2020-08-18 |
| 10715358 | Circuit for and method of receiving signals in an integrated circuit device | Wenfeng Zhang, Stanley Y. Chen, Hsung Jai Im | 2020-07-14 |
| 10715153 | Multi-port inductors and transformers for accurately predicting voltage-controlled oscillator (VCO) frequency | Adebabay M. Bekele, Didem Z. Turker Melek, Jing Jing | 2020-07-14 |
| 10630301 | Temperature-dependent phase-locked loop (PLL) reset for clock synthesizers | Adebabay M. Bekele, Didem Z. Turker Melek | 2020-04-21 |
| 10623008 | Reconfigurable fractional-N frequency generation for a phase-locked loop | Adebabay M. Bekele, Didem Z. Turker Melek, Zhaoyin D. Wu | 2020-04-14 |