Issued Patents All Time
Showing 25 most recent of 39 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10701225 | User interface definition for information processing apparatus, control method, and storage medium | — | 2020-06-30 |
| 10445477 | Information processing system, method of controlling the system, information processing apparatus, web server, and storage medium | — | 2019-10-15 |
| 10103161 | Offset backside contact via structures for a three-dimensional memory device | Masaaki Higashitani, Cheng-Chung Chu, Jayavel Pachamuthu, Tuan Pham | 2018-10-16 |
| 10051154 | Information processing apparatus, control method in information processing apparatus, and image processing apparatus | Hideki Sugiyama, Masayuki Sato, Satoki Watariuchi | 2018-08-14 |
| 9917093 | Inter-plane offset in backside contact via structures for a three-dimensional memory device | Cheng-Chung Chu, Jayavel Pachamuthu, Tuan Pham, Masaaki Higashitani | 2018-03-13 |
| 9842199 | Information processing system, method of controlling the system, information processing apparatus, web server, and storage medium | — | 2017-12-12 |
| 9648200 | Image processing system storing received image data in folder, image processing method, and storage medium | Ryuta Mori, Daijiro Miyamoto, Makiya Tamura, Natsuki Kato, Shuuhei Kawakami | 2017-05-09 |
| 9635214 | Image processing system for setting filename to received image data, image processing method therefor, and storage medium | Shuuhei Kawakami, Ryuta Mori, Makiya Tamura, Natsuki Kato, Daijiro Miyamoto | 2017-04-25 |
| 9148529 | Information processing apparatus, web server, control method and storage medium | — | 2015-09-29 |
| 9141990 | Expense registration system for registering expenses related to document received by fax | — | 2015-09-22 |
| 9117516 | Resistance change memory | Takamasa Okawa, Youichi Minemura, Takayuki Tsukamoto, Hiroshi Kanno | 2015-08-25 |
| 8988947 | Back bias during program verify of non-volatile storage | — | 2015-03-24 |
| 8947699 | Image processing apparatus and control method thereof | — | 2015-02-03 |
| 8942047 | Bit line current trip point modulation for reading nonvolatile storage elements | Man Lung Mui, Teruhiko Kamei, Yingda Dong, Ken Oowada, Yosuke Kato +1 more | 2015-01-27 |
| 8885416 | Bit line current trip point modulation for reading nonvolatile storage elements | Man Lung Mui, Teruhiko Kamei, Yingda Dong, Ken Oowada, Yosuke Kato +1 more | 2014-11-11 |
| 8699052 | Image forming apparatus, control method, and program | — | 2014-04-15 |
| 8593665 | Image forming system and information processing apparatus | — | 2013-11-26 |
| 8576634 | Semiconductor device comprising a memory cell group having a gate width larger than a second memory cell group | Yoshiyuki Kawashima, Takeshi Sakai, Yasushi Ishii, Yasuhiro Kanamaru, Takashi Hashimoto +3 more | 2013-11-05 |
| 8503244 | Fabricating and operating a memory array having a multi-level cell region and a single-level cell region | Shinji Sato | 2013-08-06 |
| 8493586 | Work flow system for deciding whether to execute the work flow based on function restriction information | — | 2013-07-23 |
| 8400658 | Network device and workflow processing system | — | 2013-03-19 |
| 8354322 | Fabricating and operating a memory array having a multi-level cell region and a single-level cell region | Shinji Sato | 2013-01-15 |
| 8312274 | Image processing apparatus and method for controlling the same | Atsushi Matsumoto, Fumio Mikami, Junya Arakawa | 2012-11-13 |
| 8026544 | Fabricating and operating a memory array having a multi-level cell region and a single-level cell region | Shinji Sato | 2011-09-27 |
| 7977186 | Providing local boosting control implant for non-volatile memory | — | 2011-07-12 |