Issued Patents All Time
Showing 26–50 of 51 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6780789 | Laser thermal oxidation to form ultra-thin gate oxide | Bin Yu, Eric N. Paton, Cyrus E. Tabery, Qi Xiang | 2004-08-24 |
| 6746944 | Low nisi/si interface contact resistance with preamorphizing and laser thermal annealing | Qi Xiang, Eric N. Paton, Cyrus E. Tabery, Bin Yu | 2004-06-08 |
| 6743689 | Method of fabrication SOI devices with accurately defined monocrystalline source/drain extensions | Eric N. Paton, Cyrus E. Tabery, Qi Xiang, Bin Yu | 2004-06-01 |
| 6716702 | Method of forming flash memory having pre-interpoly dielectric treatment layer | Arvind Halliyal | 2004-04-06 |
| 6709927 | Process for treating ONO dielectric film of a floating gate memory cell | Arvind Halliyal | 2004-03-23 |
| 6689682 | Multilayer anti-reflective coating for semiconductor lithography | Tuan Pham, Marina V. Plat | 2004-02-10 |
| 6680250 | Formation of deep amorphous region to separate junction from end-of-range defects | Eric N. Paton, Cyrus E. Tabery, Qi Xiang, Bin Yu | 2004-01-20 |
| 6674138 | Use of high-k dielectric materials in modified ONO structure for semiconductor devices | Arvind Halliyal, Mark T. Ramsbey, Kuo-Tung Chang, Nicholas H. Tripsas | 2004-01-06 |
| 6656749 | In-situ monitoring during laser thermal annealing | Eric N. Paton, Bin Yu, Cyrus E. Tabery, Qi Xiang | 2003-12-02 |
| 6645882 | Preparation of composite high-K/standard-K dielectrics for semiconductor devices | Arvind Halliyal, Joong S. Jeon, Minh Van Ngo | 2003-11-11 |
| 6620705 | Nitriding pretreatment of ONO nitride for oxide deposition | Arvind Halliyal | 2003-09-16 |
| 6586339 | Silicon barrier layer to prevent resist poisoning | Marina V. Plat, Lewis Shen | 2003-07-01 |
| 6555439 | Partial recrystallization of source/drain region before laser thermal annealing | Qi Xiang, Eric N. Paton, Cyrus E. Tabery, Bin Yu | 2003-04-29 |
| 6551888 | Tuning absorption levels during laser thermal annealing | Cyrus E. Tabery, Eric N. Paton, Bin Yu, Qi Xiang | 2003-04-22 |
| 6512264 | Flash memory having pre-interpoly dielectric treatment layer and method of forming | Arvind Halliyal | 2003-01-28 |
| 6451641 | Non-reducing process for deposition of polysilicon gate electrode over high-K gate dielectric material | Arvind Halliyal, Joong S. Jeon, Fred Cheung, Effiong Ibok | 2002-09-17 |
| 6355933 | Ion source and method for using same | Nicholas H. Tripsas | 2002-03-12 |
| 6319775 | Nitridation process for fabricating an ONO floating-gate electrode in a two-bit EEPROM device | Arvind Halliyal, Susan Kim, Kenneth Wo-Wai Au | 2001-11-20 |
| 6306777 | Flash memory having a treatment layer disposed between an interpoly dielectric structure and method of forming | Arvind Halliyal | 2001-10-23 |
| 6278166 | Use of nitric oxide surface anneal to provide reaction barrier for deposition of tantalum pentoxide | — | 2001-08-21 |
| 6265268 | High temperature oxide deposition process for fabricating an ONO floating-gate electrode in a two bit EEPROM device | Arvind Halliyal, Hideki Komori, Kenneth Wo-Wai Au | 2001-07-24 |
| 6265751 | Method and system for reducing ARC layer removal by condensing the ARC layer | Marina V. Plat | 2001-07-24 |
| 6245689 | Process for reliable ultrathin oxynitride formation | Ming-Yin Hao, Derick J. Wristers | 2001-06-12 |
| 6180538 | Process for fabricating an ONO floating-gate electrode in a two-bit EEPROM device using rapid-thermal-chemical-vapor-deposition | Arvind Halliyal, Kenneth Wo-Wai Au, Steven K. Park | 2001-01-30 |
| 5939763 | Ultrathin oxynitride structure and process for VLSI applications | Ming-Yin Hao, Derick J. Wristers | 1999-08-17 |