Issued Patents All Time
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date | Approx Value ⓘ |
|---|---|---|---|---|
| 9419101 | Multi-layer spacer used in finFET | Jianwei Peng, Hong Yu, Zhao Lun, Tao Han, Hsien-Ching Lo +2 more | 2016-08-16 | $4,818,000 |
| 6995437 | Semiconductor device with core and periphery regions | Hiroyuki Kinoshita, Yu Sun, Christopher Foster, John R. Behnke, Cyrus E. Tabery | 2006-02-07 | $12,481,000 |
| 6780708 | METHOD OF FORMING CORE AND PERIPHERY GATES INCLUDING TWO CRITICAL MASKING STEPS TO FORM A HARD MASK IN A CORE REGION THAT INCLUDES A CRITICAL DIMENSION LESS THAN ACHIEVABLE AT A RESOLUTION LIMIT OF LITHOGRAPHY | Hiroyuki Kinoshita, Yu Sun, Christopher Foster, John R. Behnke, Cyrus E. Tabery | 2004-08-24 | $2,825,000 |