Issued Patents All Time
Showing 1–25 of 54 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11121023 | FinFET device comprising a single diffusion break with an upper surface that is substantially coplanar with an upper surface of a fin | Jiehui Shu, Jinping Liu, Hui Zang | 2021-09-14 |
| 10896853 | Mask-free methods of forming structures in a semiconductor device | Jiehui Shu, Rinus Tek Po Lee, Wei Hong, Hui Zang | 2021-01-19 |
| 10784342 | Single diffusion breaks formed with liner protection for source and drain regions | Wei Hong, Jianwei Peng, Hui Zhan | 2020-09-22 |
| 10777637 | Integrated circuit product with a multi-layer single diffusion break and methods of making such products | Jiehui Shu, Hui Zang | 2020-09-15 |
| 10700173 | FinFET device with a wrap-around silicide source/drain contact structure | Yi Qi, Hsien-Ching Lo, Yanping Shen, Wei Hong, Xing Zhang +4 more | 2020-06-30 |
| 10643900 | Method to reduce FinFET short channel gate height | Xinyuan Dou, Zhenyu Hu, Xing Zhang | 2020-05-05 |
| 10580685 | Integrated single diffusion break | Hui Zang, Haiting Wang, Laertis Economikos | 2020-03-03 |
| 10566202 | Gate structures of FinFET semiconductor devices | Jiehui Shu, Hui Zang | 2020-02-18 |
| 10559470 | Capping structure | Haigou Huang, Jinsheng Gao, Jinping Liu, Huang Liu | 2020-02-11 |
| 10522410 | Performing concurrent diffusion break, gate and source/drain contact cut etch processes | Laertis Economikos, Hui Zang, Ruilong Xie, Haiting Wang | 2019-12-31 |
| 10522679 | Selective shallow trench isolation (STI) fill for stress engineering in semiconductor structures | Ashish Jha, Xinyuan Dou, Xusheng Wu, Dongil Choi, Edmund K. Banghart +1 more | 2019-12-31 |
| 10475890 | Scaled memory structures or other logic devices with middle of the line cuts | Haiting Wang, Wei Zhao, Hui Zang, Zhenyu Hu, Scott Beasor +3 more | 2019-11-12 |
| 10475693 | Method for forming single diffusion breaks between finFET devices and the resulting devices | Jiehui Shu, Jinping Liu, Hui Zang | 2019-11-12 |
| 10446683 | Methods, apparatus and system for forming sigma shaped source/drain lattice | Xusheng Wu | 2019-10-15 |
| 10403548 | Forming single diffusion break and end isolation region after metal gate replacement, and related structure | Hui Zang | 2019-09-03 |
| 10373877 | Methods of forming source/drain contact structures on integrated circuit products | Haiting Wang, Hui Zang, Wei Zhao, Yue Zhong, Guowei Xu +3 more | 2019-08-06 |
| 10121788 | Fin-type field effect transistors with single-diffusion breaks and method | Haiting Wang, Wei Zhao, Xusheng Wu, Hui Zang, Zhenyu Hu | 2018-11-06 |
| 10090382 | Integrated circuit structure including single diffusion break and end isolation region, and methods of forming same | Xinyuan Dou, Hui Zhan, Zhenyu Hu | 2018-10-02 |
| 10083874 | Gate cut method | Zhenyu Hu, Haiting Wang | 2018-09-25 |
| 10083873 | Semiconductor structure with uniform gate heights | Xing Zhang, Xinyuan Dou, Zhenyu Hu | 2018-09-25 |
| 10074732 | Methods of forming short channel and long channel finFET devices so as to adjust threshold voltages | Xinyuan Dou, Hui Zang, Yanzhen Wang | 2018-09-11 |
| 10043713 | Method to reduce FinFET short channel gate height | Xinyuan Dou, Zhenyu Hu, Xing Zhang | 2018-08-07 |
| 10014296 | Fin-type field effect transistors with single-diffusion breaks and method | Xinyuan Dou, Sipeng Gu, Yanzhen Wang | 2018-07-03 |
| 9935104 | Fin-type field effect transistors with single-diffusion breaks and method | Haiting Wang, Wei Zhao, Xusheng Wu, Hui Zang, Zhenyu Hu | 2018-04-03 |
| 9570586 | Fabrication methods facilitating integration of different device architectures | Seong Yeol Mun, Bingwu Liu, Lun Zhao, Richard J. Carter, Manfred Eller | 2017-02-14 |