Issued Patents All Time
Showing 1–25 of 65 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11651992 | Gap fill void and connection structures | Yuping Ren, Paul Ackmann, Guoxiang Ning | 2023-05-16 |
| 11349013 | IC product comprising a novel insulating gate separation structure for transistor devices | Xusheng Wu, Jinsheng Gao | 2022-05-31 |
| 11114542 | Semiconductor device with reduced gate height budget | Hui Zang | 2021-09-07 |
| 10964599 | Multi-step insulator formation in trenches to avoid seams in insulators | Asli Sirman, Jiehui Shu, Chih-Chiang Chang, Huy Cao, Jinping Liu | 2021-03-30 |
| 10930549 | Cap structure | Jinsheng Gao, Daniel Jaeger, Chih-Chiang Chang, Michael V. Aquilino, Patrick Carpenter +3 more | 2021-02-23 |
| 10923388 | Gap fill void and connection structures | Yuping Ren, Paul Ackmann, Guoxiang Ning | 2021-02-16 |
| 10777413 | Interconnects with non-mandrel cuts formed by early block patterning | Yuping Ren, Guoxiang Ning, Sunil Kumar Singh | 2020-09-15 |
| 10770344 | Chamferless interconnect vias of semiconductor devices | Yuping Ren, Ravi Prakash Srivastava, Zhiguo Sun, Qiang Fang, Cheng Xu +1 more | 2020-09-08 |
| 10714376 | Method of forming semiconductor material in trenches having different widths, and related structures | Chih-Chiang Chang, Haifeng Sheng, Jiehui Shu, Pei Liu, Jinping Liu +2 more | 2020-07-14 |
| 10644156 | Methods, apparatus, and system for reducing gate cut gouging and/or gate height loss in semiconductor devices | Jinsheng Gao, Daniel Jaeger, Michael V. Aquilino, Patrick Carpenter, Xusheng Wu | 2020-05-05 |
| 10586860 | Method of manufacturing finfet devices using narrow and wide gate cut openings in conjunction with a replacement metal gate process | Jiehui Shu, Laertis Economikos, Xusheng Wu, John H. Zhang, Hui Zhan +4 more | 2020-03-10 |
| 10559470 | Capping structure | Jinsheng Gao, Hong Yu, Jinping Liu, Huang Liu | 2020-02-11 |
| 10529831 | Methods, apparatus, and system for forming epitaxial formations with reduced risk of merging | Qun Gao, Matthew W. Stoker | 2020-01-07 |
| 10522639 | Methods, apparatus and system for stringer defect reduction in a trench cut region of a finFET device | Hui Zang, Daniel Jaeger, Veeraraghavan S. Basker, Christopher Nassar, Jinsheng Gao +1 more | 2019-12-31 |
| 10510613 | Contact structures | Jiehui Shu, Xusheng Wu, John H. Zhang, Pei Liu, Laertis Economikos | 2019-12-17 |
| 10483369 | Methods of forming replacement gate structures on transistor devices | Xusheng Wu, Jinsheng Gao | 2019-11-19 |
| 10460986 | Cap structure | Jinsheng Gao, Daniel Jaeger, Chih-Chiang Chang, Michael V. Aquilino, Patrick Carpenter +3 more | 2019-10-29 |
| 10453754 | Diffused contact extension dopants in a transistor device | Jianwei Peng, Qun Gao, Xin Wang | 2019-10-22 |
| 10453751 | Tone inversion method and structure for selective contact via patterning | Xiaofeng Qiu, Michael V. Aquilino, Patrick Carpenter, Jessica Dechene, Ming Hao Tang +1 more | 2019-10-22 |
| 10431500 | Multi-step insulator formation in trenches to avoid seams in insulators | Asli Sirman, Jiehui Shu, Chih-Chiang Chang, Huy Cao, Jinping Liu | 2019-10-01 |
| 10418272 | Methods, apparatus, and system for a semiconductor device comprising gates with short heights | Jiehui Shu, Garo Derderian, Hui Zang, John H. Zhang, Jinping Liu | 2019-09-17 |
| 10418455 | Methods, apparatus and system for stringer defect reduction in a trench cut region of a finFET device | Hui Zang, Daniel Jaeger, Veeraraghavan S. Basker, Christopher Nassar, Jinsheng Gao +1 more | 2019-09-17 |
| 10403734 | Semiconductor device with reduced gate height budget | Hui Zang | 2019-09-03 |
| 10388562 | Composite contact etch stop layer | Daniel Jaeger, Xusheng Wu, Jinsheng Gao | 2019-08-20 |
| 10347729 | Device for improving performance through gate cut last process | Xusheng Wu | 2019-07-09 |