Issued Patents All Time
Showing 251–275 of 482 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11171243 | Transistor structures with a metal oxide contact buffer | Gilbert Dewey, Abhishek A. Sharma, Van H. Le, Jack T. Kavalieros, Shriram Shivaraman +4 more | 2021-11-09 |
| 11171057 | Semiconductor fin design to mitigate fin collapse | Glenn A. Glass, Chytra Pawashe, Anand S. Murthy, Daniel Pantuso | 2021-11-09 |
| 11171058 | Self-aligned 3-D epitaxial structures for MOS device fabrication | Glenn A. Glass, Daniel B. Aubertine, Anand S. Murthy, Gaurav Thareja | 2021-11-09 |
| 11171207 | Transistor with isolation below source and drain | Willy Rachmady, Cheng-Ying Huang, Matthew V. Metz, Nicholas G. Minutillo, Sean T. Ma +3 more | 2021-11-09 |
| 11171240 | Recessed thin-channel thin-film transistor | Abhishek A. Sharma, Van H. Le, Jack T. Kavalieros, Yih Wang | 2021-11-09 |
| 11164790 | Integrated nanowire and nanoribbon patterning in transistor manufacture | Leonard P. GULER, Biswajeet Guha, Mark Armstrong, William Hsu | 2021-11-02 |
| 11152514 | Multi-layer crystalline back gated thin film transistor | Van H. Le, Abhishek A. Sharma, Gilbert Dewey, Kent Millard, Jack T. Kavalieros +6 more | 2021-10-19 |
| 11152461 | Semiconductor layer between source/drain regions and gate spacers | Rishabh Mehandru, Anupama Bowonder, Biswajeet Guha, Stephen M. Cea, William Hsu +2 more | 2021-10-19 |
| 11139241 | Integrated circuit device with crenellated metal trace layout | Patrick Morrow, Mauro J. Kobrinsky, Mark Bohr, Rishabh Mehandru, Ranjith Kumar | 2021-10-05 |
| 11139300 | Three-dimensional memory arrays with layer selector transistors | Wilfred Gomes, Mauro J. Kobrinsky, Abhishek A. Sharma, Rajesh Kumar, Kinyip Phoa +2 more | 2021-10-05 |
| 11127841 | Confined epitaxial regions for semiconductor devices and methods of fabricating semiconductor devices having confined epitaxial regions | Szuya S. Liao, Michael L. Hattendorf | 2021-09-21 |
| 11121073 | Through plate interconnect for a vertical MIM capacitor | Travis W. Lajoie, Abhishek A. Sharma, Juan G. Alzate-Vinasco, Chieh-Jen Ku, Shem Ogadhoh +6 more | 2021-09-14 |
| 11121030 | Transistors employing carbon-based etch stop layer for preserving source/drain material during contact trench etch | Glenn A. Glass, Anand S. Murthy, Karthik Jambunathan, Benjamin Chu-Kung, Seung Hoon Sung +1 more | 2021-09-14 |
| 11107890 | FINFET transistor having a doped subfin structure to reduce channel to substrate leakage | Gilbert Dewey, Matthew V. Metz, Willy Rachmady, Anand S. Murthy, Chandra S. Mohapatra +2 more | 2021-08-31 |
| 11101356 | Doped insulator cap to reduce source/drain diffusion for germanium NMOS transistors | Glenn A. Glass, Anand S. Murthy, Karthik Jambunathan, Cory Bomberger, Jack T. Kavalieros +3 more | 2021-08-24 |
| 11101268 | Transistors employing non-selective deposition of source/drain material | Karthik Jambunathan, Scott Maddox, Ritesh Jhaveri, Pratik A. Patel, Szuya S. Liao +1 more | 2021-08-24 |
| 11101350 | Integrated circuit with germanium-rich channel transistors including one or more dopant diffusion barrier elements | Glenn A. Glass, Anand S. Murthy, Karthik Jambunathan, Benjamin Chu-Kung, Seung Hoon Sung +2 more | 2021-08-24 |
| 11094785 | Deuterium-based passivation of non-planar transistor interfaces | Prashant Majhi, Glenn A. Glass, Anand S. Murthy, Aravind S. Killampalli, Mark R. Brazier +1 more | 2021-08-17 |
| 11087832 | Three-dimensional nanoribbon-based static random-access memory | Wilfred Gomes, Kinyip Phoa, Mauro J. Kobrinsky | 2021-08-10 |
| 11081570 | Transistors with lattice matched gate structure | Karthik Jambunathan, Glenn A. Glass, Anand S. Murthy, Jack T. Kavalieros, Seung Hoon Sung +1 more | 2021-08-03 |
| 11069795 | Transistors with channel and sub-channel regions with distinct compositions and dimensions | Karthik Jambunathan, Glenn A. Glass, Anand S. Murthy, Jun Sung Kang, Bruce Beattie +3 more | 2021-07-20 |
| 11063133 | Fin cut and fin trim isolation for advanced integrated circuit structure fabrication | Byron Ho, Curtis W. Ward, Michael L. Hattendorf, Christopher P. Auth | 2021-07-13 |
| 11056592 | Silicon substrate modification to enable formation of thin, relaxed, germanium-based layer | Karthik Jambunathan, Cory Bomberger, Glenn A. Glass, Anand S. Murthy, Ju H. Nam | 2021-07-06 |
| 11056492 | Dense memory arrays utilizing access transistors with back-side contacts | Wilfred Gomes, Mauro J. Kobrinsky, Elliot N. Tan, Szuya S. Liao, Swaminathan Sivakumar +1 more | 2021-07-06 |
| 11049773 | Art trench spacers to enable fin release for non-lattice matched channels | Gilbert Dewey, Matthew V. Metz, Sean T. Ma, Cheng-Ying Huang, Anand S. Murthy +4 more | 2021-06-29 |