Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Rishabh Mehandru — 134 Patents

Intel: 134 patents #117 of 30,777Top 1%
Portland, OR: #64 of 9,213 inventorsTop 1%
Oregon: #120 of 28,073 inventorsTop 1%
Overall (All Time): #7,896 of 4,157,543Top 1%
134 Patents All Time
Rishabh Mehandru has been granted 134 US patents while listed as an inventor at Intel. The first was granted in 2011 and the most recent in December 2025. Rishabh Mehandru ranks #7,896 of 4,157,543 US inventors in our database (top 0.19%). Patent records list Rishabh Mehandru in Portland, OR, US.

Issued Patents All Time

Showing 1–25 of 134 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12507449 Gate-all-around integrated circuit structures having necked feature Cornelia Weber, Varun MISHRA, Tahir Ghani, Pratik Patel, Woocheol CHUNG +1 more 2025-12-23
12501661 Integrated circuit structures having differentiated channel sizing Cornelia Weber, Clifford L. Ong, Sukru YEMENICIOGLU, Tahir Ghani, Brian J. Greene 2025-12-16
12471362 Integrated circuit structures having ultra-high conductivity global routing Abhishek Sharma, Tahir Ghani, Anand S. Murthy, Sagar Suthram, Pushkar Ranade +2 more 2025-11-11
12426299 Fin shaping and integrated circuit structures resulting therefrom Szuya S. Liao, Rahul Pandey, Anupama Bowonder, Pratik A. Patel 2025-09-23
12349420 Device, method and system to provide a stressed channel of a transistor Stephen M. Cea, Tahir Ghani, Anand S. Murthy 2025-07-01
12336278 Gate-all-around integrated circuit structures having high mobility Roza Kotlyar, Stephen M. Cea, Biswajeet Guha, Dax M. Crum, Tahir Ghani 2025-06-17
12317590 Substrate-free integrated circuit structures Biswajeet Guha, Brian J. Greene, Avyaya Jayanthinarasimham, Ayan Kar, Benjamin Orr +9 more 2025-05-27
12310044 Vertical integration scheme and circuit elements architecture for area scaling of semiconductor devices Patrick Morrow, Ranjith Kumar, Cory E. Weber, Seiyon Kim, Stephen M. Cea +1 more 2025-05-20
12288813 Gate-all-around integrated circuit structures having insulator fin on insulator substrate Aaron D. Lilak, Cory E. Weber, Willy Rachmady, Varun MISHRA 2025-04-29
12288810 Backside contact structures and fabrication for metal on both sides of devices Patrick Morrow, Aaron D. Lilak, Kimin Jun 2025-04-29
12288807 Amorphization and regrowth of source-drain regions from the bottom-side of a semiconductor assembly Aaron D. Lilak, Willy Rachmady, Harold W. Kennel, Tahir Ghani 2025-04-29
12255137 Sideways vias in isolation areas to contact interior layers in stacked devices Ehren Mannebach, Aaron D. Lilak, Hui Jae Yoo, Patrick Morrow, Anh Phan +3 more 2025-03-18
12224326 Contact architecture for capacitance reduction and satisfactory contact resistance Pratik A. Patel, Ralph T. Troeger, Szuya S. Liao 2025-02-11
12199098 Fin doping and integrated circuit structures resulting therefrom Aaron D. Lilak, Cory E. Weber, Stephen M. Cea, Leonard C. Pipes, Seahee Hwangbo +3 more 2025-01-14
12176429 Wrap-around contact structures for semiconductor nanowires and nanoribbons Tahir Ghani, Stephen M. Cea, Biswajeet Guha 2024-12-24 $17,261,000
12107085 Interconnect techniques for electrically connecting source/drain regions of stacked transistors Aaron D. Lilak, Gilbert Dewey, Cheng-Ying Huang, Christopher J. Jezewski, Ehren Mannebach +4 more 2024-10-01 $20,560,000
12100705 Deep trench via for three-dimensional integrated circuit Yih Wang, Mauro J. Kobrinsky, Tahir Ghani, Mark Bohr, Marni Nabors 2024-09-24 $33,787,000
12100623 Vertically stacked finFETs and shared gate patterning Aaron D. Lilak, Sean T. Ma, Justin R. Weber, Stephen M. Cea, Patrick Morrow +1 more 2024-09-24 $33,787,000
12057494 Stacked transistors Patrick Morrow, Aaron D. Lilak 2024-08-06 $17,070,000
12033896 Isolation wall stressor structures to improve channel stress and their methods of fabrication Aaron D. Lilak, Christopher J. Jezewski, Willy Rachmady, Gilbert Dewey, Anh Phan 2024-07-09 $24,938,000
11996362 Integrated circuit device with crenellated metal trace layout Patrick Morrow, Mauro J. Kobrinsky, Mark Bohr, Tahir Ghani, Ranjith Kumar 2024-05-28 $30,739,000
11984506 Field effect transistor having a gate dielectric with a dipole layer and having a gate stressor layer Vishal Tiwari, Dan S. LAVRIC, Michal Mleczko, Szuya S. Liao 2024-05-14 $33,809,000
11942526 Integrated circuit contact structures Patrick Morrow, Glenn A. Glass, Anand S. Murthy 2024-03-26 $33,708,000
11942416 Sideways vias in isolation areas to contact interior layers in stacked devices Ehren Mannebach, Aaron D. Lilak, Hui Jae Yoo, Patrick Morrow, Anh Phan +3 more 2024-03-26 $33,708,000
11935933 Backside contact structures and fabrication for metal on both sides of devices Patrick Morrow, Aaron D. Lilak, Kimin Jun 2024-03-19 $28,784,000