Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Patrick Morrow — 189 Patents

Intel: 188 patents #68 of 30,777Top 1%
INIntle: 1 patents #1 of 16Top 7%
Portland, OR: #31 of 9,213 inventorsTop 1%
Oregon: #66 of 28,073 inventorsTop 1%
Overall (All Time): #3,834 of 4,157,543Top 1%
189 Patents All Time
Patrick Morrow has been granted 189 US patents while listed as an inventor at Intel. The first was granted in 2002 and the most recent in December 2025. Patrick Morrow ranks #3,834 of 4,157,543 US inventors in our database (top 0.09%). Patent records list Patrick Morrow in Portland, OR, US.

Issued Patents All Time

Showing 1–25 of 189 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12506059 Vertically spaced intra-level interconnect line metallization for integrated circuit devices Keh-I Lin, Sukru YEMENICIOGLU, Richard E. Schenker, Mauro J. Kobrinsky 2025-12-23
12446204 SRAM with P-type access transistors and complementary field-effect transistor technology Charles Augustine, Seenivasan Subramaniam, Muhammad M. Khellah 2025-10-14
12369399 Gate-to-gate isolation for stacked transistor architecture via selective dielectric deposition structure Willy Rachmady, Sudipto Naskar, Cheng-Ying Huang, Gilbert Dewey, Marko Radosavljevic +2 more 2025-07-22
12342614 Asymmetric gate structures and contacts for stacked transistors Cheng-Ying Huang, Arunshankar Venkataraman, Sean T. Ma, Willy Rachmady, Nicole K. Thomas +2 more 2025-06-24
12310044 Vertical integration scheme and circuit elements architecture for area scaling of semiconductor devices Rishabh Mehandru, Ranjith Kumar, Cory E. Weber, Seiyon Kim, Stephen M. Cea +1 more 2025-05-20
12288810 Backside contact structures and fabrication for metal on both sides of devices Rishabh Mehandru, Aaron D. Lilak, Kimin Jun 2025-04-29
12255137 Sideways vias in isolation areas to contact interior layers in stacked devices Ehren Mannebach, Aaron D. Lilak, Hui Jae Yoo, Anh Phan, Willy Rachmady +3 more 2025-03-18
12224202 Forming an oxide volume within a fin Cheng-Ying Huang, Gilbert Dewey, Jack T. Kavalieros, Aaron D. Lilak, Ehren Mannebach +3 more 2025-02-11
12199143 Gate-all-around integrated circuit structures having removed substrate Biswajeet Guha, Mauro J. Kobrinsky, Oleg Golonzka, Tahir Ghani 2025-01-14
12176323 Microelectronic assemblies Adel A. Elsherbini, Henning Braunisch, Aleksandar Aleksov, Shawna M. Liff, Johanna M. Swan +3 more 2024-12-24 $17,261,000
12148806 Stacked source-drain-gate connection and process for forming such Ehren Mannebach, Aaron D. Lilak, Hui Jae Yoo, Anh Phan, Willy Rachmady +2 more 2024-11-19 $25,575,000
12107085 Interconnect techniques for electrically connecting source/drain regions of stacked transistors Aaron D. Lilak, Gilbert Dewey, Cheng-Ying Huang, Christopher J. Jezewski, Ehren Mannebach +4 more 2024-10-01 $20,560,000
12100623 Vertically stacked finFETs and shared gate patterning Aaron D. Lilak, Sean T. Ma, Justin R. Weber, Rishabh Mehandru, Stephen M. Cea +1 more 2024-09-24 $33,787,000
12100762 Wrap-around source/drain method of making contacts for backside metals Kimin Jun, Il-Seok Son, Donald W. Nelson 2024-09-24 $33,787,000
12100761 Wrap-around source/drain method of making contacts for backside metals Kimin Jun, Il-Seok Son, Donald W. Nelson 2024-09-24 $33,787,000
12080605 Backside contacts for semiconductor devices Aaron D. Lilak, Ehren Mannebach, Anh Phan, Richard E. Schenker, Stephanie A. Bojarski +4 more 2024-09-03 $14,017,000
12057494 Stacked transistors Rishabh Mehandru, Aaron D. Lilak 2024-08-06 $17,070,000
12051723 PN-body-tied field effect transistors Aaron D. Lilak, Kerryann Marrietta Foley, Sayed Hasan, Willy Rachmady 2024-07-30 $27,313,000
12020929 Epitaxial layer with substantially parallel sides Cheng-Ying Huang, Gilbert Dewey, Jack T. Kavalieros, Aaron D. Lilak, Ehren Mannebach +3 more 2024-06-25 $22,163,000
11996411 Stacked forksheet transistors Cheng-Ying Huang, Gilbert Dewey, Anh Phan, Nicole K. Thomas, Urusa Alaan +8 more 2024-05-28 $30,739,000
11996362 Integrated circuit device with crenellated metal trace layout Mauro J. Kobrinsky, Mark Bohr, Tahir Ghani, Rishabh Mehandru, Ranjith Kumar 2024-05-28 $30,739,000
11990899 Multi-level spin logic Sasikanth Manipatruni, Ian A. Young, Dmitri E. Nikonov, Uygar E. Avci, Anurag Chaudhry 2024-05-21 $18,840,000
11948874 Vertically spaced intra-level interconnect line metallization for integrated circuit devices Kevin Lin, Sukru YEMENICIOGLU, Richard E. Schenker, Mauro J. Kobrinsky 2024-04-02 $34,819,000
11948831 Apparatus with multi-wafer based device and method for forming such Anup Pancholi, Prashant Majhi, Paul B. Fischer 2024-04-02 $34,819,000
11942526 Integrated circuit contact structures Glenn A. Glass, Anand S. Murthy, Rishabh Mehandru 2024-03-26 $33,708,000