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USPTO Patent Rankings Data through Dec 31, 2025
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Cory E. Weber — 48 Patents

Intel: 47 patents #700 of 30,777Top 3%
Google: 1 patents #14,887 of 22,993Top 65%
Hillsboro, OR: #68 of 2,365 inventorsTop 3%
Oregon: #734 of 28,073 inventorsTop 3%
Overall (All Time): #57,596 of 4,157,543Top 2%
48 Patents All Time
Cory E. Weber has been granted 48 US patents while listed as an inventor at Intel. The first was granted in 2001 and the most recent in August 2025. Cory E. Weber ranks #57,596 of 4,157,543 US inventors in our database (top 1.4%). Patent records list Cory E. Weber in Hillsboro, OR, US.

Issued Patents All Time

Showing 1–25 of 48 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12389629 Source/drain regions in integrated circuit structures Sean T. Ma 2025-08-12
12310044 Vertical integration scheme and circuit elements architecture for area scaling of semiconductor devices Rishabh Mehandru, Patrick Morrow, Ranjith Kumar, Seiyon Kim, Stephen M. Cea +1 more 2025-05-20
12288813 Gate-all-around integrated circuit structures having insulator fin on insulator substrate Aaron D. Lilak, Rishabh Mehandru, Willy Rachmady, Varun MISHRA 2025-04-29
12243875 Forksheet transistors with dielectric or conductive spine Seung Hoon Sung, Cheng-Ying Huang, Marko Radosavljevic, Christopher M. Neumann, Susmita Ghose +4 more 2025-03-04
12199098 Fin doping and integrated circuit structures resulting therefrom Aaron D. Lilak, Stephen M. Cea, Leonard C. Pipes, Seahee Hwangbo, Rishabh Mehandru +3 more 2025-01-14
12191349 Reducing off-state leakage in semiconductor devices Dipanjan Basu, Justin R. Weber, Sean T. Ma, Harold W. Kennel, Seung Hoon Sung +3 more 2025-01-07
12068206 Extension of nanocomb transistor arrangements to implement gate all around Varun MISHRA, Stephen M. Cea, Jack T. Kavalieros, Tahir Ghani 2024-08-20 $20,163,000
11990476 Semiconductor nanowire device having (111)-plane channel sidewalls Harold W. Kennel, Willy Rachmady, Gilbert Dewey 2024-05-21 $18,840,000
11923370 Forksheet transistors with dielectric or conductive spine Seung Hoon Sung, Cheng-Ying Huang, Marko Radosavljevic, Christopher M. Neumann, Susmita Ghose +4 more 2024-03-05 $29,696,000
11881517 Channel structures for thin-film transistors Abhishek A. Sharma, Van H. Le, Sean T. Ma 2024-01-23 $52,361,000
11862702 Gate-all-around integrated circuit structures having insulator FIN on insulator substrate Aaron D. Lilak, Rishabh Mehandru, Willy Rachmady, Varun MISHRA 2024-01-02 $30,016,000
11757026 Nanowire structures having wrap-around contacts Stephen M. Cea, Patrick H. Keys, Seiyon Kim, Michael Haverty, Sadasivan Shankar 2023-09-12 $80,406,000
11522072 Vertical integration scheme and circuit elements architecture for area scaling of semiconductor devices Rishabh Mehandru, Patrick Morrow, Ranjith Kumar, Seiyon Kim, Stephen M. Cea +1 more 2022-12-06 $14,727,000
11515420 Contacts to n-type transistors with X-valley layer over L-valley channels Dax M. Crum, Rishabh Mehandru, Harold W. Kennel, Benjamin Chu-Kung 2022-11-29 $14,086,000
11398478 Semiconductor nanowire device having (111)-plane channel sidewalls Harold W. Kennel, Willy Rachmady, Gilbert Dewey 2022-07-26 $27,041,000
11342432 Gate-all-around integrated circuit structures having insulator fin on insulator substrate Aaron D. Lilak, Rishabh Mehandru, Willy Rachmady, Varun MISHRA 2022-05-24 $18,289,000
11335789 Channel structures for thin-film transistors Abhishek A. Sharma, Van H. Le, Sean T. Ma 2022-05-17 $14,251,000
11264453 Methods of doping fin structures of non-planar transistor devices Aaron D. Lilak, Szuya S. Liao, Aaron A. Budrevich 2022-03-01 $16,941,000
11222947 Methods of doping fin structures of non-planar transistor devices Aaron D. Lilak, Szuya S. Liao, Aaron A. Budrevich 2022-01-11 $33,310,000
11011620 Techniques for increasing channel region tensile strain in n-MOS devices Rishabh Mehandru, Anand S. Murthy, Karthik Jambunathan, Glenn A. Glass, Jiong Zhang +2 more 2021-05-18 $44,170,000
10991696 Vertically stacked devices with self-aligned regions formed by direct self assembly (DSA) processing Aaron D. Lilak, Patrick Theofanis, Stephen M. Cea, Rishabh Mehandru 2021-04-27 $44,593,000
10910405 Backside fin recess control with multi-HSI option Aaron D. Lilak, Patrick Morrow, Stephen M. Cea, Rishabh Mehandru 2021-02-02 $28,243,000
10847635 Vertical integration scheme and circuit elements architecture for area scaling of semiconductor devices Rishabh Mehandru, Patrick Morrow, Ranjith Kumar, Seiyon Kim, Stephen M. Cea +1 more 2020-11-24 $25,522,000
10847653 Semiconductor device having metallic source and drain regions Martin D. Giles, Annalisa Cappellani, Sanaz K. Gardner, Rafael Rios, Aaron A. Budrevich 2020-11-24 $25,522,000
10840366 Nanowire structures having wrap-around contacts Stephen M. Cea, Patrick H. Keys, Seiyon Kim, Michael Haverty, Sadasivan Shankar 2020-11-17 $36,756,000