Issued Patents All Time
Showing 25 most recent of 126 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12349420 | Device, method and system to provide a stressed channel of a transistor | Rishabh Mehandru, Tahir Ghani, Anand S. Murthy | 2025-07-01 |
| 12336278 | Gate-all-around integrated circuit structures having high mobility | Roza Kotlyar, Rishabh Mehandru, Biswajeet Guha, Dax M. Crum, Tahir Ghani | 2025-06-17 |
| 12310044 | Vertical integration scheme and circuit elements architecture for area scaling of semiconductor devices | Rishabh Mehandru, Patrick Morrow, Ranjith Kumar, Cory E. Weber, Seiyon Kim +1 more | 2025-05-20 |
| 12294006 | Gate-all-around integrated circuit structures having insulator substrate | Chung-Hsun Lin, Biswajeet Guha, William Hsu, Tahir Ghani | 2025-05-06 |
| 12243875 | Forksheet transistors with dielectric or conductive spine | Seung Hoon Sung, Cheng-Ying Huang, Marko Radosavljevic, Christopher M. Neumann, Susmita Ghose +4 more | 2025-03-04 |
| 12199142 | Neighboring gate-all-around integrated circuit structures having conductive contact stressor between epitaxial source or drain regions | Siddharth Chouksey, Jack T. Kavalieros, Ashish Agrawal, Willy Rachmady | 2025-01-14 |
| 12199098 | Fin doping and integrated circuit structures resulting therefrom | Aaron D. Lilak, Cory E. Weber, Leonard C. Pipes, Seahee Hwangbo, Rishabh Mehandru +3 more | 2025-01-14 |
| 12176429 | Wrap-around contact structures for semiconductor nanowires and nanoribbons | Rishabh Mehandru, Tahir Ghani, Biswajeet Guha | 2024-12-24 |
| 12142634 | Silicon and silicon germanium nanowire structures | Kelin J. Kuhn, Seiyon Kim, Rafael Rios, Martin D. Giles, Annalisa Cappellani +3 more | 2024-11-12 |
| 12125916 | Nanowire structures having non-discrete source and drain regions | Annalisa Cappellani, Martin D. Giles, Rafael Rios, Seiyon Kim, Kelin J. Kuhn | 2024-10-22 |
| 12100623 | Vertically stacked finFETs and shared gate patterning | Aaron D. Lilak, Sean T. Ma, Justin R. Weber, Rishabh Mehandru, Patrick Morrow +1 more | 2024-09-24 |
| 12068206 | Extension of nanocomb transistor arrangements to implement gate all around | Varun MISHRA, Cory E. Weber, Jack T. Kavalieros, Tahir Ghani | 2024-08-20 |
| 12057491 | Self-aligned gate endcap (SAGE) architectures with gate-all-around devices above insulator substrates | Biswajeet Guha, Dax M. Crum, Leonard P. GULER, Tahir Ghani | 2024-08-06 |
| 11984449 | Channel structures with sub-fin dopant diffusion blocking layers | Cory Bomberger, Anand S. Murthy, Biswajeet Guha, Anupama Bowonder, Tahir Ghani | 2024-05-14 |
| 11923370 | Forksheet transistors with dielectric or conductive spine | Seung Hoon Sung, Cheng-Ying Huang, Marko Radosavljevic, Christopher M. Neumann, Susmita Ghose +4 more | 2024-03-05 |
| 11923412 | Sub-fin leakage reduction for template strained materials | Rishabh Mehandru, Anupama Bowonder, Juhyung Nam, Willy Rachmady | 2024-03-05 |
| 11843052 | Transistor contact area enhancement | Rishabh Mehandru, Tahir Ghani | 2023-12-12 |
| 11824107 | Wrap-around contact structures for semiconductor nanowires and nanoribbons | Rishabh Mehandru, Tahir Ghani, Biswajeet Guha | 2023-11-21 |
| 11757026 | Nanowire structures having wrap-around contacts | Cory E. Weber, Patrick H. Keys, Seiyon Kim, Michael Haverty, Sadasivan Shankar | 2023-09-12 |
| 11705518 | Isolation schemes for gate-all-around transistor devices | Rishabh Mehandru, Biswajeet Guha, Tahir Ghani, William Hsu | 2023-07-18 |
| 11688780 | Deep source and drain for transistor structures with back-side contact metallization | Rishabh Mehandru, Tahir Ghani | 2023-06-27 |
| 11676965 | Strained tunable nanowire structures and process | Tahir Ghani, Anand S. Murthy, Biswajeet Guha | 2023-06-13 |
| 11658183 | Metallization structures under a semiconductor device layer | Aaron D. Lilak, Rishabh Mehandru, Patrick Morrow | 2023-05-23 |
| 11600696 | Sub-fin leakage reduction for template strained materials | Rishabh Mehandru, Anupama Bowonder, Juhyung Nam, Willy Rachmady | 2023-03-07 |
| 11581406 | Method of fabricating CMOS FinFETs by selectively etching a strained SiGe layer | Roza Kotlyar, Harold W. Kennel, Anand S. Murthy, Glenn A. Glass, Kelin J. Kuhn +1 more | 2023-02-14 |