SC

Stephen M. Cea

IN Intel: 120 patents #141 of 30,777Top 1%
Google: 3 patents #8,000 of 22,993Top 35%
SO Sony: 2 patents #12,963 of 25,231Top 55%
DP Daedalus Prime: 1 patents #13 of 21Top 65%
📍 Hillsboro, OR: #7 of 2,365 inventorsTop 1%
🗺 Oregon: #136 of 28,073 inventorsTop 1%
Overall (All Time): #8,874 of 4,157,543Top 1%
126
Patents All Time

Issued Patents All Time

Showing 51–75 of 126 patents

Patent #TitleCo-InventorsDate
10991799 Silicon and silicon germanium nanowire structures Kelin J. Kuhn, Seiyon Kim, Rafael Rios, Martin D. Giles, Annalisa Cappellani +3 more 2021-04-27
10991696 Vertically stacked devices with self-aligned regions formed by direct self assembly (DSA) processing Aaron D. Lilak, Patrick Theofanis, Cory E. Weber, Rishabh Mehandru 2021-04-27
10937665 Methods and apparatus for gettering impurities in semiconductors Aaron D. Lilak, Harold W. Kennel, Patrick Morrow, Rishabh Mehandru 2021-03-02
10910405 Backside fin recess control with multi-HSI option Aaron D. Lilak, Patrick Morrow, Rishabh Mehandru, Cory E. Weber 2021-02-02
10892326 Removal of a bottom-most nanowire from a nanowire device stack Aaron D. Lilak, Patrick H. Keys, Sean T. Ma, Rishabh Mehandru 2021-01-12
10886272 Techniques for forming dual-strain fins for co-integrated n-MOS and p-MOS devices Rishabh Mehandru, Anupama Bowonder, Anand S. Murthy, Tahir Ghani 2021-01-05
10854752 High mobility strained channels for fin-based NMOS transistors Roza Kotlyar, Harold W. Kennel, Glenn A. Glass, Anand S. Murthy, Willy Rachmady +1 more 2020-12-01
10847635 Vertical integration scheme and circuit elements architecture for area scaling of semiconductor devices Rishabh Mehandru, Patrick Morrow, Ranjith Kumar, Cory E. Weber, Seiyon Kim +1 more 2020-11-24
10840366 Nanowire structures having wrap-around contacts Cory E. Weber, Patrick H. Keys, Seiyon Kim, Michael Haverty, Sadasivan Shankar 2020-11-17
10790281 Stacked channel structures for MOSFETs Rishabh Mehandru, Roza Kotlyar, Patrick H. Keys 2020-09-29
10636907 Deep EPI enabled by backside reveal for stress enhancement and contact Aaron D. Lilak, Rishabh Mehandru, Patrick Morrow, Patrick H. Keys 2020-04-28
10636871 Silicon and silicon germanium nanowire structures Kelin J. Kuhn, Seiyon Kim, Rafael Rios, Martin D. Giles, Annalisa Cappellani +3 more 2020-04-28
10600810 Backside fin recess control with multi-hsi option Aaron D. Lilak, Patrick Morrow, Rishabh Mehandru, Cory E. Weber 2020-03-24
10580899 Nanowire structures having non-discrete source and drain regions Annalisa Cappellani, Martin D. Giles, Rafael Rios, Seiyon Kim, Kelin J. Kuhn 2020-03-03
10573715 Backside isolation for integrated circuit Aaron D. Lilak, Rishabh Mehandru, Harold W. Kennel, Paul B. Fischer 2020-02-25
10529827 Long channel MOS transistors for low leakage applications on a short channel CMOS chip Rishabh Mehandru, Patrick Morrow, Paul B. Fischer, Aaron D. Lilak 2020-01-07
10497781 Methods for doping a sub-fin region of a semiconductor structure by backside reveal and associated devices Aaron D. Lilak, Rishabh Mehandru, Cory E. Weber 2019-12-03
10483385 Nanowire structures having wrap-around contacts Cory E. Weber, Patrick H. Keys, Seiyon Kim, Michael Haverty, Sadasivan Shankar 2019-11-19
10468489 Isolation structures for an integrated circuit element and method of making same Aaron D. Lilak, Uygar E. Avci, David L. Kencke, Patrick Morrow, Kerryann Marrietta Foley +1 more 2019-11-05
10453967 Semiconductor nanowire device having cavity spacer and method of fabricating cavity spacer for semiconductor nanowire device Rishabh Mehandru, Szuya S. Liao 2019-10-22
10411090 Hybrid trigate and nanowire CMOS device architecture Cory E. Weber, Rishabh Mehandru 2019-09-10
10403752 Prevention of subchannel leakage current in a semiconductor device with a fin structure Karthik Jambunathan, Glenn A. Glass, Chandra S. Mohapatra, Anand S. Murthy, Tahir Ghani 2019-09-03
10304946 Vertical integration scheme and circuit elements architecture for area scaling of semiconductor devices Rishabh Mehandru, Patrick Morrow, Ranjith Kumar, Cory E. Weber, Seiyon Kim +1 more 2019-05-28
10304929 Two-dimensional condensation for uniaxially strained semiconductor fins Jack T. Kavalieros, Nancy Zelick, Been-Yih Jin, Markus Kuhn 2019-05-28
10153372 High mobility strained channels for fin-based NMOS transistors Roza Kotlyar, Harold W. Kennel, Glenn A. Glass, Anand S. Murthy, Willy Rachmady +1 more 2018-12-11