Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
JK

Jack T. Kavalieros — 627 Patents

Intel: 616 patents #1 of 30,777Top 1%
Sony: 4 patents #9,005 of 25,231Top 40%
TRTahoe Research: 2 patents #16 of 215Top 8%
Google: 2 patents #10,599 of 22,993Top 50%
Portland, OR: #1 of 9,213 inventorsTop 1%
Oregon: #3 of 28,073 inventorsTop 1%
Overall (All Time): #230 of 4,157,543Top 1%
627 Patents All Time
Jack T. Kavalieros has been granted 627 US patents while listed as an inventor at Intel. The first was granted in 2000 and the most recent in December 2025. Jack T. Kavalieros ranks #230 of 4,157,543 US inventors in our database (top 0.01%). Patent records list Jack T. Kavalieros in Portland, OR, US.

Issued Patents All Time

Showing 1–25 of 627 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12513958 Nanowire transistor fabrication with hardmask layers Seung Hoon Sung, Seok Hwan Kim, Kelin J. Kuhn, Willy Rachmady 2025-12-30
12439659 Gate-all-around integrated circuit structures having germanium-diffused nanoribbon channel structures Andy Chi-Hung Wei, Guillaume Bouche 2025-10-07
12433007 Transistor gate trench engineering to decrease capacitance and resistance Seung Hoon Sung, Willy Rachmady, Han Wui Then, Marko Radosavljevic 2025-09-30
12426247 Capacitor connections in dielectric layers Travis W. Lajoie, Abhishek A. Sharma, Van H. Le, Chieh-Jen Ku, Pei-Hua Wang +13 more 2025-09-23
12414339 Formation of gate spacers for strained PMOS gate-all-around transistor structures Ashish Agrawal, Gilbert Dewey, Siddharth Chouksey, Cheng-Ying Huang 2025-09-09
12376362 Field effect transistors with a gated oxide semiconductor source/drain spacer Gilbert Dewey, Rafael Rios, Van H. Le 2025-07-29
12349416 Transistor structures with a metal oxide contact buffer and a method of fabricating the transistor structures Gilbert Dewey, Abhishek A. Sharma, Van H. Le, Shriram Shivaraman, Seung Hoon Sung +4 more 2025-07-01
12342614 Asymmetric gate structures and contacts for stacked transistors Cheng-Ying Huang, Patrick Morrow, Arunshankar Venkataraman, Sean T. Ma, Willy Rachmady +2 more 2025-06-24
12310101 Gate dielectrics for complementary metal oxide semiconductors transistors and methods of fabrication Ashish Verma Penumatcha, Seung Hoon Sung, Uygar E. Avci, Tristan A. Tronic, Shriram Shivaraman +5 more 2025-05-20
12288803 Transistor with isolation below source and drain Willy Rachmady, Cheng-Ying Huang, Matthew V. Metz, Nicholas G. Minutillo, Sean T. Ma +3 more 2025-04-29
12266570 Self-aligned interconnect structures and methods of fabrication Kimin Jun, Souvik Ghosh, Willy Rachmady, Ashish Agrawal, Siddharth Chouksey +5 more 2025-04-01
12255234 Integrated circuit structures having germanium-based channels Siddharth Chouksey, Glenn A. Glass, Anand S. Murthy, Harold W. Kennel, Tahir Ghani +2 more 2025-03-18
12243875 Forksheet transistors with dielectric or conductive spine Seung Hoon Sung, Cheng-Ying Huang, Marko Radosavljevic, Christopher M. Neumann, Susmita Ghose +4 more 2025-03-04
12238913 Two transistor memory cell using stacked thin-film transistors Abhishek A. Sharma, Juan G. Alzate-Vinasco, Fatih Hamzaoglu, Bernhard Sell, Pei-Hua Wang +5 more 2025-02-25
12224202 Forming an oxide volume within a fin Cheng-Ying Huang, Gilbert Dewey, Aaron D. Lilak, Ehren Mannebach, Patrick Morrow +3 more 2025-02-11
12199142 Neighboring gate-all-around integrated circuit structures having conductive contact stressor between epitaxial source or drain regions Siddharth Chouksey, Stephen M. Cea, Ashish Agrawal, Willy Rachmady 2025-01-14
12191395 Dual gate control for trench shaped thin film transistors Abhishek A. Sharma, Van H. Le, Gilbert Dewey, Shriram Shivaraman, Benjamin Chu-Kung +2 more 2025-01-07
12191349 Reducing off-state leakage in semiconductor devices Dipanjan Basu, Cory E. Weber, Justin R. Weber, Sean T. Ma, Harold W. Kennel +3 more 2025-01-07
12183831 Self-aligned contacts for thin film transistors Van H. Le, Abhishek A. Sharma, Benjamin Chu-Kung, Gilbert Dewey, Ravi Pillarisetty +4 more 2024-12-31 $16,542,000
12176284 Through plate interconnect for a vertical MIM capacitor Travis W. Lajoie, Abhishek A. Sharma, Juan G. Alzate-Vinasco, Chieh-Jen Ku, Shem Ogadhoh +6 more 2024-12-24 $17,261,000
12142689 Transistor including wrap around source and drain contacts Sean T. Ma, Abhishek A. Sharma, Gilbert Dewey, Van H. Le 2024-11-12 $28,491,000
12125917 Thin film transistors having double gates Abhishek A. Sharma, Van H. Le, Tahir Ghani, Gilbert Dewey 2024-10-22 $18,859,000
12119409 Multi-layer crystalline back gated thin film transistor Van H. Le, Abhishek A. Sharma, Gilbert Dewey, Kent Millard, Shriram Shivaraman +6 more 2024-10-15 $19,078,000
12120865 Arrays of double-sided dram cells including capacitors on the frontside and backside of a stacked transistor structure Cheng-Ying Huang, Ashish Agrawal, Gilbert Dewey, Abhishek A. Sharma, Wilfred Gomes 2024-10-15 $19,078,000
12119387 Low resistance approaches for fabricating contacts and the resulting structures Gilbert Dewey, Nazila Haratipour, Siddharth Chouksey, Jitendra Kumar Jha, Matthew V. Metz +6 more 2024-10-15 $19,078,000