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USPTO Patent Rankings Data through Dec 31, 2025
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Rafael Rios — 158 Patents

KCKepler Computing: 72 patents #6 of 42Top 15%
Intel: 71 patents #383 of 30,777Top 2%
Sony: 6 patents #6,820 of 25,231Top 30%
Google: 3 patents #8,096 of 22,993Top 40%
Austin, TX: #44 of 18,064 inventorsTop 1%
Texas: #161 of 125,132 inventorsTop 1%
Overall (All Time): #5,580 of 4,157,543Top 1%
158 Patents All Time
Rafael Rios has been granted 158 US patents while listed as an inventor at Kepler Computing. The first was granted in 2001 and the most recent in November 2025. Rafael Rios ranks #5,580 of 4,157,543 US inventors in our database (top 0.13%). Patent records list Rafael Rios in Austin, TX, US.

Issued Patents All Time

Showing 1–25 of 158 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12481481 Asynchronous carry-ripple adder with majority or minority gates Amrita Mathuriya, Nabil Imam, Ikenna Odinaka, Rajeev Kumar Dokania, Sasikanth Manipatruni 2025-11-25
12451888 Ripple carry adder with ferroelectric or paraelectric wide-input minority or majority gates Amrita Mathuriya, Ikenna Odinaka, Rajeev Kumar Dokania, Sasikanth Manipatruni 2025-10-21
12445134 Diode connected non-linear input capacitors based majority gate Amrita Mathuriya, Dmitri E. Nikonov, Biswajeet Guha, Ikenna Odinaka, Rajeev Kumar Dokania +1 more 2025-10-14
12436739 Non-linear polar material based low power multiplier with transmission-gate based reset mechanism Amrita Mathuriya, Ikenna Odinaka, Rajeev Kumar Dokania, Sasikanth Manipatruni 2025-10-07
12439606 Gate coupled non-linear polar material based capacitors for memory and logic Noriyuki Sato, Tanay Gosavi, Amrita Mathuriya, Niloy Mukherjee, Mauricio Manfrini +3 more 2025-10-07
12411657 Asynchronous full-adder with majority or minority gates to generate carry-out true output Nabil Imam, Amrita Mathuriya, Ikenna Odinaka, Rajeev Kumar Dokania, Sasikanth Manipatruni 2025-09-09
12405768 Asynchronous full-adder with majority or minority gates to generate carry-out false output Nabil Imam, Amrita Mathuriya, Ikenna Odinaka, Rajeev Kumar Dokania, Sasikanth Manipatruni 2025-09-02
12379898 Asynchronous full-adder with majority or minority gates to generate sum false output Nabil Imam, Amrita Mathuriya, Ikenna Odinaka, Rajeev Kumar Dokania, Sasikanth Manipatruni 2025-08-05
12374377 Ferroelectric or paraelectric wide-input minority or majority gate based low power adder Amrita Mathuriya, Ikenna Odinaka, Rajeev Kumar Dokania, Sasikanth Manipatruni 2025-07-29
12376312 Methods of fabricating planar capacitors on a shared plate electrode Noriyuki Sato, Tanay Gosavi, Amrita Mathuriya, Niloy Mukherjee, Mauricio Manfrini +3 more 2025-07-29
12376362 Field effect transistors with a gated oxide semiconductor source/drain spacer Gilbert Dewey, Van H. Le, Jack T. Kavalieros 2025-07-29
12369326 Capacitor devices with shared electrode and methods of fabrication Noriyuki Sato, Tanay Gosavi, Amrita Mathuriya, Niloy Mukherjee, Mauricio Manfrini +3 more 2025-07-22
12363967 Integration methods to fabricate internal spacers for nanowire devices Seiyon Kim, Kelin J. Kuhn, Tahir Ghani, Anand S. Murthy, Mark Armstrong +2 more 2025-07-15
12349365 Drain coupled non-linear polar material based capacitors for memory and logic Noriyuki Sato, Tanay Gosavi, Amrita Mathuriya, Niloy Mukherjee, Mauricio Manfrini +3 more 2025-07-01
12334918 Stacked non-planar capacitors based multi-function linear threshold gate with input based adaptive threshold Amrita Mathuriya, Ikenna Odinaka, Rajeev Kumar Dokania, Debo Olaosebikan, Sasikanth Manipatruni 2025-06-17
12336184 Methods of fabricating trench capacitors on a shared plate electrode Noriyuki Sato, Tanay Gosavi, Amrita Mathuriya, Niloy Mukherjee, Mauricio Manfrini +3 more 2025-06-17
12334923 Multi-cycle reset mechanism for a chain of majority gates having non-linear polar material Amrita Mathuriya, Ikenna Odinaka, Rajeev Kumar Dokania, Sasikanth Manipatruni 2025-06-17
12328878 Integration of 2T-NC for memory and logic applications Noriyuki Sato, Tanay Gosavi, Amrita Mathuriya, Niloy Mukherjee, Mauricio Manfrini +3 more 2025-06-10
12324163 Planar capacitors with shared electrode and methods of fabrication Noriyuki Sato, Tanay Gosavi, Amrita Mathuriya, Niloy Mukherjee, Mauricio Manfrini +3 more 2025-06-03
12324162 Stacked capacitors with shared electrodes and methods of fabrication Rajeev Kumar Dokania, Noriyuki Sato, Tanay Gosavi, Amrita Mathuriya, Niloy Mukherjee +2 more 2025-06-03
12322743 Multi-function threshold gate with input based adaptive threshold and with stacked non-planar paraelectric capacitors Amrita Mathuriya, Ikenna Odinaka, Rajeev Kumar Dokania, Debo Olaosebikan, Sasikanth Manipatruni 2025-06-03
12316319 Multi-function linear threshold gate with input based adaptive threshold Amrita Mathuriya, Ikenna Odinaka, Rajeev Kumar Dokania, Sasikanth Manipatruni 2025-05-27
12308838 Exclusive-or logic gate with non-linear input capacitors Amrita Mathuriya, Ikenna Odinaka, Darshak Doshi, Rajeev Kumar Dokania, Sasikanth Manipatruni 2025-05-20
12308836 Method of adjusting threshold of a linear capacitive-input circuit Amrita Mathuriya, Ikenna Odinaka, Rajeev Kumar Dokania, Sasikanth Manipatruni 2025-05-20
12294370 Area optimized ferroelectric or paraelectric based low power multiplier Amrita Mathuriya, Ikenna Odinaka, Rajeev Kumar Dokania, Sasikanth Manipatruni 2025-05-06