Issued Patents All Time
Showing 25 most recent of 80 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12412782 | Semiconductor device and method for fabricating the same | — | 2025-09-09 |
| 12363967 | Integration methods to fabricate internal spacers for nanowire devices | Kelin J. Kuhn, Tahir Ghani, Anand S. Murthy, Mark Armstrong, Rafael Rios +2 more | 2025-07-15 |
| 12310044 | Vertical integration scheme and circuit elements architecture for area scaling of semiconductor devices | Rishabh Mehandru, Patrick Morrow, Ranjith Kumar, Cory E. Weber, Stephen M. Cea +1 more | 2025-05-20 |
| 12142634 | Silicon and silicon germanium nanowire structures | Kelin J. Kuhn, Rafael Rios, Stephen M. Cea, Martin D. Giles, Annalisa Cappellani +3 more | 2024-11-12 |
| 12125916 | Nanowire structures having non-discrete source and drain regions | Stephen M. Cea, Annalisa Cappellani, Martin D. Giles, Rafael Rios, Kelin J. Kuhn | 2024-10-22 |
| 12046637 | Nanowire transistor fabrication with hardmask layers | Seung Hoon Sung, Kelin J. Kuhn, Willy Rachmady, Jack T. Kavalieros | 2024-07-23 |
| 11869939 | Integration methods to fabricate internal spacers for nanowire devices | Kelin J. Kuhn, Tahir Ghani, Anand S. Murthy, Mark Armstrong, Rafael Rios +2 more | 2024-01-09 |
| 11799029 | Multilayer insulator stack for ferroelectric transistor and capacitor | Uygar E. Avci, Joshua M. Howard, Ian A. Young | 2023-10-24 |
| 11757026 | Nanowire structures having wrap-around contacts | Stephen M. Cea, Cory E. Weber, Patrick H. Keys, Michael Haverty, Sadasivan Shankar | 2023-09-12 |
| 11735652 | Field effect transistors having ferroelectric or antiferroelectric gate dielectric structure | Uygar E. Avci, Joshua M. Howard, Ian A. Young, Daniel H. Morris | 2023-08-22 |
| 11723188 | Replacement metal COB integration process for embedded DRAM | Uygar E. Avci, Ian A. Young, Daniel H. Morris, Yih Wang, Ruth A. Brain | 2023-08-08 |
| 11677003 | Nanowire transistor fabrication with hardmask layers | Seung Hoon Sung, Kelin J. Kuhn, Willy Rachmady, Jack T. Kavalieros | 2023-06-13 |
| 11552180 | Antiferroelectric perovskite gate oxide for transistor applications | Sasikanth Manipatruni, Uygar E. Avci, Ian A. Young | 2023-01-10 |
| 11552197 | Nanowire structures having non-discrete source and drain regions | Stephen M. Cea, Annalisa Cappellani, Martin D. Giles, Rafael Rios, Kelin J. Kuhn | 2023-01-10 |
| 11522072 | Vertical integration scheme and circuit elements architecture for area scaling of semiconductor devices | Rishabh Mehandru, Patrick Morrow, Ranjith Kumar, Cory E. Weber, Stephen M. Cea +1 more | 2022-12-06 |
| 11502103 | Memory cell with a ferroelectric capacitor integrated with a transtor gate | Daniel H. Morris, Uygar E. Avci, Ian A. Young | 2022-11-15 |
| 11456372 | Multi-height finfet device by selective oxidation | Gopinath Bhimarasetti, Rafael Rios, Jack T. Kavalieros, Tahir Ghani, Anand S. Murthy +1 more | 2022-09-27 |
| 11335600 | Integration method for finfet with tightly controlled multiple fin heights | Jack T. Kavalieros, Anand S. Murthy, Glenn A. Glass, Karthik Jambunathan | 2022-05-17 |
| 11322504 | Ferroelectric-capacitor integration using novel multi-metal-level interconnect with replaced dielectric for ultra-dense embedded SRAM in state-of-the-art CMOS technology | Uygar E. Avci, Daniel H. Morris, Yih Wang, Ruth A. Brain, Ian A. Young | 2022-05-03 |
| 11302777 | Integration methods to fabricate internal spacers for nanowire devices | Kelin J. Kuhn, Tahir Ghani, Anand S. Murthy, Mark Armstrong, Rafael Rios +2 more | 2022-04-12 |
| 11239361 | Multilayer insulator stack for ferroelectric transistor and capacitor | Uygar E. Avci, Joshua M. Howard, Ian A. Young | 2022-02-01 |
| 11171145 | Memory devices based on capacitors with built-in electric field | Sou-Chi Chang, Uygar E. Avci, Daniel H. Morris, Ashish Verma Penumatcha, Ian A. Young | 2021-11-09 |
| 11139400 | Non-planar semiconductor device having hybrid geometry-based active region | Rafael Rios, Fahmida Ferdousi, Kelin J. Kuhn | 2021-10-05 |
| 11024714 | Nanowire transistor fabrication with hardmask layers | Seung Hoon Sung, Kelin J. Kuhn, Willy Rachmady, Jack T. Kavalieros | 2021-06-01 |
| 11004978 | Methods of forming doped source/drain contacts and structures formed thereby | Glenn A. Glass, Karthik Jambunathan, Anand S. Murthy, Chandra S. Mohapatra | 2021-05-11 |