Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
RK

Ranjith Kumar — 17 Patents

Intel: 12 patents #3,451 of 30,777Top 15%
Samsung: 3 patents #31,179 of 75,807Top 45%
TSMC: 2 patents #6,667 of 12,232Top 55%
Beaverton, OR: #353 of 3,140 inventorsTop 15%
Oregon: #2,576 of 28,073 inventorsTop 10%
Overall (All Time): #263,971 of 4,157,543Top 7%
17 Patents All Time
Ranjith Kumar has been granted 17 US patents while listed as an inventor at Intel. The first was granted in 2019 and the most recent in May 2025. Ranjith Kumar ranks #263,971 of 4,157,543 US inventors in our database (top 6.3%). Patent records list Ranjith Kumar in Beaverton, OR, US.

Issued Patents All Time

Showing 1–17 of 17 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12310044 Vertical integration scheme and circuit elements architecture for area scaling of semiconductor devices Rishabh Mehandru, Patrick Morrow, Cory E. Weber, Seiyon Kim, Stephen M. Cea +1 more 2025-05-20
12223247 Logic cell structures and related methods Kumar Lalgudi, Mohammed Rabiul Islam, Jianyang Xu 2025-02-11
12067338 Multi version library cell handling and integrated circuit structures fabricated therefrom Quan Shi, Mark Bohr, Andrew W. Yeoh, Sourav Chakravarty, Barbara A. Chappell +1 more 2024-08-20 $20,163,000
11996362 Integrated circuit device with crenellated metal trace layout Patrick Morrow, Mauro J. Kobrinsky, Mark Bohr, Tahir Ghani, Rishabh Mehandru 2024-05-28 $30,739,000
11816412 Logic cell structures and related methods Kumar Lalgudi, Mohammed Rabiul Islam, Jianyang Xu 2023-11-14 $9,707,000
11764219 Metal space centered standard cell architecture to enable higher cell density Harshitha Vishwanath, Renukprasad HIREMATH, Sukru YEMENICIOGLU, Ruth A. Brain 2023-09-19 $20,015,000
11682664 Standard cell architecture with power tracks completely inside a cell Srinivasa Chaitanya Gadigatla, Marni Nabors, Quan V. Phan 2023-06-20 $18,411,000
11522072 Vertical integration scheme and circuit elements architecture for area scaling of semiconductor devices Rishabh Mehandru, Patrick Morrow, Cory E. Weber, Seiyon Kim, Stephen M. Cea +1 more 2022-12-06 $14,727,000
11409935 Pin must-connects for improved performance Srinivasa Chaitanya Gadigatla, Tamanna Husain, Abhinand Ramakrishnan, James Graeber, Kohinoor Basu 2022-08-09 $13,688,000
11271010 Multi version library cell handling and integrated circuit structures fabricated therefrom Quan Shi, Mark Bohr, Andrew W. Yeoh, Sourav Chakravarty, Barbara A. Chappell +1 more 2022-03-08 $16,017,000
11153779 Apparatus and method for transmitting and receiving data based on an identified event in wireless communication system Madhan Raj Kanagarathinam, Karthikeyan Arunachalam, Venkata Sunil Kumar B 2021-10-19
11139241 Integrated circuit device with crenellated metal trace layout Patrick Morrow, Mauro J. Kobrinsky, Mark Bohr, Tahir Ghani, Rishabh Mehandru 2021-10-05 $23,463,000
11068640 Power shared cell architecture Mark Bohr, Ruth A. Brain, Marni Nabors, Tai-Hsuan Wu, Sourav Chakravarty 2021-07-20 $44,320,000
10847635 Vertical integration scheme and circuit elements architecture for area scaling of semiconductor devices Rishabh Mehandru, Patrick Morrow, Cory E. Weber, Seiyon Kim, Stephen M. Cea +1 more 2020-11-24 $25,522,000
10523794 Method and apparatus for managing multipath transmission control protocol Madhan Raj Kanagarathinam, Kartik Swaminathan Iyer, Kyoung-jin MOON, Dronamraju Siva Sabareesh, Jae Won Jang +2 more 2019-12-31
10304946 Vertical integration scheme and circuit elements architecture for area scaling of semiconductor devices Rishabh Mehandru, Patrick Morrow, Cory E. Weber, Seiyon Kim, Stephen M. Cea +1 more 2019-05-28 $17,387,000
10203882 Method for managing multiple bandwidth boost solutions co-existing in an electronic device Venkata Ratnakar Rao Rayavarapu, Bhagwan Dass Swami, Debjit Roy, Giri Venkata Prasad Reddy Chintakuntla, Jae Won Jang +5 more 2019-02-12