Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12310044 | Vertical integration scheme and circuit elements architecture for area scaling of semiconductor devices | Rishabh Mehandru, Patrick Morrow, Cory E. Weber, Seiyon Kim, Stephen M. Cea +1 more | 2025-05-20 |
| 12223247 | Logic cell structures and related methods | Kumar Lalgudi, Mohammed Rabiul Islam, Jianyang Xu | 2025-02-11 |
| 12067338 | Multi version library cell handling and integrated circuit structures fabricated therefrom | Quan Shi, Mark Bohr, Andrew W. Yeoh, Sourav Chakravarty, Barbara A. Chappell +1 more | 2024-08-20 |
| 11996362 | Integrated circuit device with crenellated metal trace layout | Patrick Morrow, Mauro J. Kobrinsky, Mark Bohr, Tahir Ghani, Rishabh Mehandru | 2024-05-28 |
| 11816412 | Logic cell structures and related methods | Kumar Lalgudi, Mohammed Rabiul Islam, Jianyang Xu | 2023-11-14 |
| 11764219 | Metal space centered standard cell architecture to enable higher cell density | Harshitha Vishwanath, Renukprasad HIREMATH, Sukru YEMENICIOGLU, Ruth A. Brain | 2023-09-19 |
| 11682664 | Standard cell architecture with power tracks completely inside a cell | Srinivasa Chaitanya Gadigatla, Marni Nabors, Quan V. Phan | 2023-06-20 |
| 11522072 | Vertical integration scheme and circuit elements architecture for area scaling of semiconductor devices | Rishabh Mehandru, Patrick Morrow, Cory E. Weber, Seiyon Kim, Stephen M. Cea +1 more | 2022-12-06 |
| 11409935 | Pin must-connects for improved performance | Srinivasa Chaitanya Gadigatla, Tamanna Husain, Abhinand Ramakrishnan, James Graeber, Kohinoor Basu | 2022-08-09 |
| 11271010 | Multi version library cell handling and integrated circuit structures fabricated therefrom | Quan Shi, Mark Bohr, Andrew W. Yeoh, Sourav Chakravarty, Barbara A. Chappell +1 more | 2022-03-08 |
| 11153779 | Apparatus and method for transmitting and receiving data based on an identified event in wireless communication system | Madhan Raj Kanagarathinam, Karthikeyan Arunachalam, Venkata Sunil Kumar B | 2021-10-19 |
| 11139241 | Integrated circuit device with crenellated metal trace layout | Patrick Morrow, Mauro J. Kobrinsky, Mark Bohr, Tahir Ghani, Rishabh Mehandru | 2021-10-05 |
| 11068640 | Power shared cell architecture | Mark Bohr, Ruth A. Brain, Marni Nabors, Tai-Hsuan Wu, Sourav Chakravarty | 2021-07-20 |
| 10847635 | Vertical integration scheme and circuit elements architecture for area scaling of semiconductor devices | Rishabh Mehandru, Patrick Morrow, Cory E. Weber, Seiyon Kim, Stephen M. Cea +1 more | 2020-11-24 |
| 10523794 | Method and apparatus for managing multipath transmission control protocol | Madhan Raj Kanagarathinam, Kartik Swaminathan Iyer, Kyoung-jin MOON, Dronamraju Siva Sabareesh, Jae Won Jang +2 more | 2019-12-31 |
| 10304946 | Vertical integration scheme and circuit elements architecture for area scaling of semiconductor devices | Rishabh Mehandru, Patrick Morrow, Cory E. Weber, Seiyon Kim, Stephen M. Cea +1 more | 2019-05-28 |
| 10203882 | Method for managing multiple bandwidth boost solutions co-existing in an electronic device | Venkata Ratnakar Rao Rayavarapu, Bhagwan Dass Swami, Debjit Roy, Giri Venkata Prasad Reddy Chintakuntla, Jae Won Jang +5 more | 2019-02-12 |