| 12419085 |
Integrated circuit structures having backside gate tie-down |
Leonard P. GULER, Mauro J. Kobrinsky, Mohit K. HARAN, Tahir Ghani, Charles H. Wallace +2 more |
2025-09-16 |
| 12100705 |
Deep trench via for three-dimensional integrated circuit |
Yih Wang, Rishabh Mehandru, Mauro J. Kobrinsky, Tahir Ghani, Mark Bohr |
2024-09-24 |
| 12051692 |
Integrated circuit structure with front side signal lines and backside power delivery |
Quan Shi, Sukru YEMENICIOGLU, Nikolay RYZHENKO, Xinning Wang, Sivakumar Venkataraman |
2024-07-30 |
| 11881452 |
Device layer interconnects |
Mark Bohr, Mauro J. Kobrinsky |
2024-01-23 |
| 11682664 |
Standard cell architecture with power tracks completely inside a cell |
Srinivasa Chaitanya Gadigatla, Ranjith Kumar, Quan V. Phan |
2023-06-20 |
| 11410928 |
Device layer interconnects |
Mark Bohr, Mauro J. Kobrinsky |
2022-08-09 |
| 11373999 |
Deep trench via for three-dimensional integrated circuit |
Yih Wang, Rishabh Mehandru, Mauro J. Kobrinsky, Tahir Ghani, Mark Bohr |
2022-06-28 |
| 11068640 |
Power shared cell architecture |
Ranjith Kumar, Mark Bohr, Ruth A. Brain, Tai-Hsuan Wu, Sourav Chakravarty |
2021-07-20 |