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USPTO Patent Rankings Data through Dec 31, 2025
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Aaron D. Lilak — 118 Patents

Intel: 118 patents #145 of 30,777Top 1%
Beaverton, OR: #20 of 3,140 inventorsTop 1%
Oregon: #159 of 28,073 inventorsTop 1%
Overall (All Time): #10,312 of 4,157,543Top 1%
118 Patents All Time
Aaron D. Lilak has been granted 118 US patents while listed as an inventor at Intel. The first was granted in 2005 and the most recent in December 2025. Aaron D. Lilak ranks #10,312 of 4,157,543 US inventors in our database (top 0.25%). Patent records list Aaron D. Lilak in Beaverton, OR, US.

Issued Patents All Time

Showing 1–25 of 118 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12513984 Double-sided integrated circuit transistor structures with depopulated bottom channel regions Varun MISHRA, Peng Zheng, Tahir Ghani, Harold W. Kennel, Mauro J. Kobrinsky 2025-12-30
12328864 3D 1T1C stacked dram structure and method to fabricate Sean T. Ma, Abhishek A. Sharma 2025-06-10
12288810 Backside contact structures and fabrication for metal on both sides of devices Patrick Morrow, Rishabh Mehandru, Kimin Jun 2025-04-29
12288813 Gate-all-around integrated circuit structures having insulator fin on insulator substrate Rishabh Mehandru, Cory E. Weber, Willy Rachmady, Varun MISHRA 2025-04-29
12288807 Amorphization and regrowth of source-drain regions from the bottom-side of a semiconductor assembly Rishabh Mehandru, Willy Rachmady, Harold W. Kennel, Tahir Ghani 2025-04-29
12255137 Sideways vias in isolation areas to contact interior layers in stacked devices Ehren Mannebach, Hui Jae Yoo, Patrick Morrow, Anh Phan, Willy Rachmady +3 more 2025-03-18
12224202 Forming an oxide volume within a fin Cheng-Ying Huang, Gilbert Dewey, Jack T. Kavalieros, Ehren Mannebach, Patrick Morrow +3 more 2025-02-11
12199098 Fin doping and integrated circuit structures resulting therefrom Cory E. Weber, Stephen M. Cea, Leonard C. Pipes, Seahee Hwangbo, Rishabh Mehandru +3 more 2025-01-14
12148806 Stacked source-drain-gate connection and process for forming such Ehren Mannebach, Hui Jae Yoo, Patrick Morrow, Anh Phan, Willy Rachmady +2 more 2024-11-19 $25,575,000
12107085 Interconnect techniques for electrically connecting source/drain regions of stacked transistors Gilbert Dewey, Cheng-Ying Huang, Christopher J. Jezewski, Ehren Mannebach, Rishabh Mehandru +4 more 2024-10-01 $20,560,000
12100623 Vertically stacked finFETs and shared gate patterning Sean T. Ma, Justin R. Weber, Rishabh Mehandru, Stephen M. Cea, Patrick Morrow +1 more 2024-09-24 $33,787,000
12080605 Backside contacts for semiconductor devices Ehren Mannebach, Anh Phan, Richard E. Schenker, Stephanie A. Bojarski, Willy Rachmady +4 more 2024-09-03 $14,017,000
12057494 Stacked transistors Patrick Morrow, Rishabh Mehandru 2024-08-06 $17,070,000
12051723 PN-body-tied field effect transistors Kerryann Marrietta Foley, Sayed Hasan, Patrick Morrow, Willy Rachmady 2024-07-30 $27,313,000
12033896 Isolation wall stressor structures to improve channel stress and their methods of fabrication Christopher J. Jezewski, Willy Rachmady, Rishabh Mehandru, Gilbert Dewey, Anh Phan 2024-07-09 $24,938,000
12020929 Epitaxial layer with substantially parallel sides Cheng-Ying Huang, Gilbert Dewey, Jack T. Kavalieros, Ehren Mannebach, Patrick Morrow +3 more 2024-06-25 $22,163,000
11996408 Leave-behind protective layer having secondary purpose Anh Phan, Ehren Mannebach, Cheng-Ying Huang, Stephanie A. Bojarski, Gilbert Dewey +2 more 2024-05-28 $30,739,000
11942416 Sideways vias in isolation areas to contact interior layers in stacked devices Ehren Mannebach, Hui Jae Yoo, Patrick Morrow, Anh Phan, Willy Rachmady +3 more 2024-03-26 $33,708,000
11935933 Backside contact structures and fabrication for metal on both sides of devices Patrick Morrow, Rishabh Mehandru, Kimin Jun 2024-03-19 $28,784,000
11935891 Non-silicon N-type and P-type stacked transistors for integrated circuit devices Gilbert Dewey, Patrick Morrow, Ravi Pillarisetty, Rishabh Mehandru, Cheng-Ying Huang +1 more 2024-03-19 $28,784,000
11916118 Stacked source-drain-gate connection and process for forming such Ehren Mannebach, Hui Jae Yoo, Patrick Morrow, Anh Phan, Willy Rachmady +2 more 2024-02-27 $28,450,000
11894372 Stacked trigate transistors with dielectric isolation and process for forming such Willy Rachmady, Cheng-Ying Huang, Gilbert Dewey, Patrick Morrow, Anh Phan +2 more 2024-02-06 $35,892,000
11894262 Back side processing of integrated circuit structures to form insulation structure between adjacent transistor structures Rishabh Mehandru, Patrick Morrow 2024-02-06 $35,892,000
11869894 Metallization structures for stacked device connectivity and their methods of fabrication Anh Phan, Patrick Morrow, Willy Rachmady, Gilbert Dewey, Jessica M. Torres +6 more 2024-01-09 $30,329,000
11862702 Gate-all-around integrated circuit structures having insulator FIN on insulator substrate Rishabh Mehandru, Cory E. Weber, Willy Rachmady, Varun MISHRA 2024-01-02 $30,016,000