| 12255137 |
Sideways vias in isolation areas to contact interior layers in stacked devices |
Ehren Mannebach, Aaron D. Lilak, Hui Jae Yoo, Patrick Morrow, Willy Rachmady +3 more |
2025-03-18 |
|
| 12224202 |
Forming an oxide volume within a fin |
Cheng-Ying Huang, Gilbert Dewey, Jack T. Kavalieros, Aaron D. Lilak, Ehren Mannebach +3 more |
2025-02-11 |
|
| 12148806 |
Stacked source-drain-gate connection and process for forming such |
Ehren Mannebach, Aaron D. Lilak, Hui Jae Yoo, Patrick Morrow, Willy Rachmady +2 more |
2024-11-19 |
$25,575,000 |
| 12107085 |
Interconnect techniques for electrically connecting source/drain regions of stacked transistors |
Aaron D. Lilak, Gilbert Dewey, Cheng-Ying Huang, Christopher J. Jezewski, Ehren Mannebach +4 more |
2024-10-01 |
$20,560,000 |
| 12080605 |
Backside contacts for semiconductor devices |
Aaron D. Lilak, Ehren Mannebach, Richard E. Schenker, Stephanie A. Bojarski, Willy Rachmady +4 more |
2024-09-03 |
$14,017,000 |
| 12033896 |
Isolation wall stressor structures to improve channel stress and their methods of fabrication |
Aaron D. Lilak, Christopher J. Jezewski, Willy Rachmady, Rishabh Mehandru, Gilbert Dewey |
2024-07-09 |
$24,938,000 |
| 12020929 |
Epitaxial layer with substantially parallel sides |
Cheng-Ying Huang, Gilbert Dewey, Jack T. Kavalieros, Aaron D. Lilak, Ehren Mannebach +3 more |
2024-06-25 |
$22,163,000 |
| 11996408 |
Leave-behind protective layer having secondary purpose |
Aaron D. Lilak, Ehren Mannebach, Cheng-Ying Huang, Stephanie A. Bojarski, Gilbert Dewey +2 more |
2024-05-28 |
$30,739,000 |
| 11996411 |
Stacked forksheet transistors |
Cheng-Ying Huang, Gilbert Dewey, Nicole K. Thomas, Urusa Alaan, Seung Hoon Sung +8 more |
2024-05-28 |
$30,739,000 |
| 11942416 |
Sideways vias in isolation areas to contact interior layers in stacked devices |
Ehren Mannebach, Aaron D. Lilak, Hui Jae Yoo, Patrick Morrow, Willy Rachmady +3 more |
2024-03-26 |
$33,708,000 |
| 11916118 |
Stacked source-drain-gate connection and process for forming such |
Ehren Mannebach, Aaron D. Lilak, Hui Jae Yoo, Patrick Morrow, Willy Rachmady +2 more |
2024-02-27 |
$28,450,000 |
| 11894372 |
Stacked trigate transistors with dielectric isolation and process for forming such |
Willy Rachmady, Cheng-Ying Huang, Gilbert Dewey, Aaron D. Lilak, Patrick Morrow +2 more |
2024-02-06 |
$35,892,000 |
| 11869894 |
Metallization structures for stacked device connectivity and their methods of fabrication |
Aaron D. Lilak, Patrick Morrow, Willy Rachmady, Gilbert Dewey, Jessica M. Torres +6 more |
2024-01-09 |
$30,329,000 |
| 11830933 |
Gate-all-around integrated circuit structures having depopulated channel structures using bottom-up oxidation approach |
Willy Rachmady, Gilbert Dewey, Jack T. Kavalieros, Aaron D. Lilak, Patrick Morrow +2 more |
2023-11-28 |
$31,872,000 |
| 11776898 |
Sidewall interconnect metallization structures for integrated circuit devices |
Aaron D. Lilak, Gilbert Dewey, Willy Rachmady, Patrick Morrow |
2023-10-03 |
$24,984,000 |
| 11764263 |
Gate-all-around integrated circuit structures having depopulated channel structures using multiple bottom-up oxidation approaches |
Ehren Mannebach, Aaron D. Lilak, Willy Rachmady, Gilbert Dewey, Cheng-Ying Huang +3 more |
2023-09-19 |
$20,015,000 |
| 11764104 |
Forming an oxide volume within a fin |
Cheng-Ying Huang, Gilbert Dewey, Jack T. Kavalieros, Aaron D. Lilak, Ehren Mannebach +3 more |
2023-09-19 |
$20,015,000 |
| 11742346 |
Interconnect techniques for electrically connecting source/drain regions of stacked transistors |
Aaron D. Lilak, Gilbert Dewey, Cheng-Ying Huang, Christopher J. Jezewski, Ehren Mannebach +4 more |
2023-08-29 |
$19,273,000 |
| 11699637 |
Vertically stacked transistor devices with isolation wall structures containing an electrical conductor |
Aaron D. Lilak, Patrick Morrow, Stephanie A. Bojarski |
2023-07-11 |
$21,736,000 |
| 11676966 |
Stacked transistors having device strata with different channel widths |
Gilbert Dewey, Jack T. Kavalieros, Willy Rachmady, Cheng-Ying Huang, Matthew V. Metz +4 more |
2023-06-13 |
$22,204,000 |
| 11646352 |
Stacked source-drain-gate connection and process for forming such |
Ehren Mannebach, Aaron D. Lilak, Hui Jae Yoo, Patrick Morrow, Willy Rachmady +2 more |
2023-05-09 |
$19,706,000 |
| 11640961 |
III-V source/drain in top NMOS transistors for low temperature stacked transistor contacts |
Gilbert Dewey, Ravi Pillarisetty, Jack T. Kavalieros, Aaron D. Lilak, Willy Rachmady +6 more |
2023-05-02 |
$21,235,000 |
| 11616060 |
Techniques for forming gate structures for transistors arranged in a stacked configuration on a single fin structure |
Aaron D. Lilak, Gilbert Dewey, Willy Rachmady, Rami Hourani, Stephanie A. Bojarski +2 more |
2023-03-28 |
$20,940,000 |
| 11616056 |
Vertical diode in stacked transistor architecture |
Aaron D. Lilak, Patrick Morrow, Cheng-Ying Huang, Rishabh Mehandru, Gilbert Dewey +1 more |
2023-03-28 |
$20,940,000 |
| 11605565 |
Three dimensional integrated circuits with stacked transistors |
Cheng-Ying Huang, Willy Rachmady, Gilbert Dewey, Aaron D. Lilak, Kimin Jun +5 more |
2023-03-14 |
$29,588,000 |
