Issued Patents All Time
Showing 51–75 of 117 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11594533 | Stacked trigate transistors with dielectric isolation between first and second semiconductor fins | Willy Rachmady, Cheng-Ying Huang, Gilbert Dewey, Patrick Morrow, Anh Phan +2 more | 2023-02-28 |
| 11574910 | Device with air-gaps to reduce coupling capacitance and process for forming such | Abhishek A. Sharma, Willy Rachmady, Van H. Le, Travis W. Lajoie, Urusa Alaan +2 more | 2023-02-07 |
| 11573798 | Stacked transistors with different gate lengths in different device strata | Gilbert Dewey, Willy Rachmady, Rishabh Mehandru, Ehren Mannebach, Cheng-Ying Huang +2 more | 2023-02-07 |
| 11569238 | Vertical memory cells | Willy Rachmady, Gilbert Dewey, Kimin Jun, Hui Jae Yoo, Patrick Morrow +5 more | 2023-01-31 |
| 11563119 | Etchstop regions in fins of semiconductor devices | Cheng-Ying Huang, Willy Rachmady, Gilbert Dewey, Erica J. Thompson, Jack T. Kavalieros | 2023-01-24 |
| 11552104 | Stacked transistors with dielectric between channels of different device strata | Gilbert Dewey, Willy Rachmady, Rishabh Mehandru, Ehren Mannebach, Cheng-Ying Huang +3 more | 2023-01-10 |
| 11538808 | Structures and methods for memory cells | Sean T. Ma, Abhishek A. Sharma, Van H. Le, Seung Hoon Sung, Gilbert Dewey +3 more | 2022-12-27 |
| 11532719 | Transistors on heterogeneous bonding layers | Kimin Jun, Jack T. Kavalieros, Gilbert Dewey, Willy Rachmady, Brennen Mueller +5 more | 2022-12-20 |
| 11527613 | Removal of a bottom-most nanowire from a nanowire device stack | Patrick H. Keys, Sean T. Ma, Stephen M. Cea, Rishabh Mehandru | 2022-12-13 |
| 11515318 | 3D floating-gate multiple-input device | Patrick Morrow, Sayed Hasan | 2022-11-29 |
| 11495683 | Multiple strain states in epitaxial transistor channel through the incorporation of stress-relief defects within an underlying seed material | Patrick H. Keys, Sayed Hasan, Stephen M. Cea, Anupama Bowonder | 2022-11-08 |
| 11482621 | Vertically stacked CMOS with upfront M0 interconnect | Willy Rachmady, Patrick Morrow, Rishabh Mehandru, Cheng-Ying Huang, Gilbert Dewey +4 more | 2022-10-25 |
| 11462568 | Stacked thin film transistors | Justin R. Weber, Harold W. Kennel, Willy Rachmady, Gilbert Dewey, Van H. Le +3 more | 2022-10-04 |
| 11444148 | Recoiled metal thin film for 3D inductor with tunable core | Gwang-Soo Kim, Kumhyo Byon, Doug B. Ingerly | 2022-09-13 |
| 11437405 | Transistors stacked on front-end p-type transistors | Gilbert Dewey, Patrick Morrow, Willy Rachmady, Anh Phan, Ehren Mannebach +4 more | 2022-09-06 |
| 11437283 | Backside contacts for semiconductor devices | Ehren Mannebach, Anh Phan, Richard E. Schenker, Stephanie A. Bojarski, Willy Rachmady +4 more | 2022-09-06 |
| 11430814 | Metallization structures for stacked device connectivity and their methods of fabrication | Anh Phan, Patrick Morrow, Willy Rachmady, Gilbert Dewey, Jessica M. Torres +6 more | 2022-08-30 |
| 11424160 | Self-aligned local interconnects | Ehren Mannebach, Anh Phan, Richard E. Schenker, Stephanie A. Bojarski, Willy Rachmady +5 more | 2022-08-23 |
| 11411119 | Double gated thin film transistors | Van H. Le, Abhishek A. Sharma, Tahir Ghani, Rishabh Mehandru, Gilbert Dewey +1 more | 2022-08-09 |
| 11404319 | Vertically stacked finFETs and shared gate patterning | Sean T. Ma, Justin R. Weber, Rishabh Mehandru, Stephen M. Cea, Patrick Morrow +1 more | 2022-08-02 |
| 11398479 | Heterogeneous Ge/III-V CMOS transistor structures | Willy Rachmady, Abhishek A. Sharma, Ravi Pillarisetty, Patrick Morrow, Rishabh Mehandru +2 more | 2022-07-26 |
| 11393818 | Stacked transistors with Si PMOS and high mobility thin film transistor NMOS | Gilbert Dewey, Ravi Pillarisetty, Abhishek A. Sharma, Willy Rachmady, Rishabh Mehandru +5 more | 2022-07-19 |
| 11393722 | Isolation wall stressor structures to improve channel stress and their methods of fabrication | Christopher J. Jezewski, Willy Rachmady, Rishabh Mehandru, Gilbert Dewey, Anh Phan | 2022-07-19 |
| 11387238 | Non-silicon N-Type and P-Type stacked transistors for integrated circuit devices | Gilbert Dewey, Patrick Morrow, Ravi Pillarisetty, Rishabh Mehandru, Cheng-Ying Huang +1 more | 2022-07-12 |
| 11380684 | Stacked transistor architecture including nanowire or nanoribbon thin film transistors | Gilbert Dewey, Cheng-Ying Huang, Jack T. Kavalieros, Willy Rachmady, Anh Phan +4 more | 2022-07-05 |