| 12476183 |
Punch-through interconnect feature to couple upper electrodes of capacitors of multi-level memory arrays |
Travis W. Lajoie, Juan Alzate Vinasco, Abhishek Sharma, Van H. Le, Moshe Dolejsi +3 more |
2025-11-18 |
|
| 12444685 |
Backside electrical contact for PMOS epitaxial voltage supply |
Clifford L. Ong, Zheng Guo, Eirc A. Karl, Smita Shridharan, Mauro J. Kobrinsky +3 more |
2025-10-14 |
|
| 12446208 |
Multilevel wordline assembly for embedded DRAM |
Juan G. Alzate-Vinasco, Travis W. Lajoie, Elliot N. Tan, Kimberly Pierce, Abhishek Sharma +3 more |
2025-10-14 |
|
| 12426247 |
Capacitor connections in dielectric layers |
Travis W. Lajoie, Abhishek A. Sharma, Van H. Le, Chieh-Jen Ku, Pei-Hua Wang +13 more |
2025-09-23 |
|
| 12176284 |
Through plate interconnect for a vertical MIM capacitor |
Travis W. Lajoie, Abhishek A. Sharma, Juan G. Alzate-Vinasco, Chieh-Jen Ku, Allen B. Gardiner +6 more |
2024-12-24 |
$17,261,000 |
| 12080643 |
Integrated circuit structures having differentiated interconnect lines in a same dielectric layer |
Travis W. Lajoie, Abhishek A. Sharma, Juan G. Alzate Vinasco, Chieh-Jen Ku, Allen B. Gardiner +6 more |
2024-09-03 |
$14,017,000 |
| 11991873 |
Capacitor separations in dielectric layers |
Travis W. Lajoie, Abhishek A. Sharma, Van H. Le, Chieh-Jen Ku, Pei-Hua Wang +13 more |
2024-05-21 |
$18,840,000 |
| 11832438 |
Capacitor connections in dielectric layers |
Travis W. Lajoie, Abhishek A. Sharma, Van H. Le, Chieh-Jen Ku, Pei-Hua Wang +13 more |
2023-11-28 |
$31,872,000 |
| 11652047 |
Intermediate separation layers at the back-end-of-line |
Travis W. Lajoie, Abhishek A. Sharma, Van H. Le, Chieh-Jen Ku, Pei-Hua Wang +13 more |
2023-05-16 |
$11,130,000 |
| 11610894 |
Capacitor separations in dielectric layers |
Travis W. Lajoie, Abhishek A. Sharma, Van H. Le, Chieh-Jen Ku, Pei-Hua Wang +13 more |
2023-03-21 |
$20,076,000 |
| 11581162 |
Fill pattern to enhance ebeam process margin |
Shakul Tandon, Mark C. Phillips, John A. Swanson |
2023-02-14 |
$12,790,000 |
| 11563107 |
Method of contact patterning of thin film transistors for embedded DRAM using a multi-layer hardmask |
Chieh-Jen Ku, Bernhard Sell, Pei-Hua Wang, Nikhil MEHTA, Shu Zhou +5 more |
2023-01-24 |
$19,543,000 |
| 11404536 |
Thin-film transistor structures with gas spacer |
Travis W. Lajoie, Abhishek A. Sharma, Juan G. Alzate-Vinasco, Chieh-Jen Ku, Allen B. Gardiner +6 more |
2022-08-02 |
$13,520,000 |
| 11121073 |
Through plate interconnect for a vertical MIM capacitor |
Travis W. Lajoie, Abhishek A. Sharma, Juan G. Alzate-Vinasco, Chieh-Jen Ku, Allen B. Gardiner +6 more |
2021-09-14 |
$31,644,000 |
| 11107658 |
Fill pattern to enhance e-beam process margin |
Shakul Tandon, Mark C. Phillips, John A. Swanson |
2021-08-31 |
$22,590,000 |
| 9046761 |
Lithography mask having sub-resolution phased assist features |
Charles H. Wallace, Ryan Pearman, Sven Henrichs, Arvind Sundaramurthy, Swaminathan Sivakumar |
2015-06-02 |
$17,367,000 |
| 8959465 |
Techniques for phase tuning for process optimization |
Paul A. Nyhus, Swaminathan Sivakumar, Seongtae Jeong |
2015-02-17 |
$23,949,000 |
| 8778605 |
Mask design and OPC for device manufacture |
Raguraman Venkatesan, Kevin Hooker, Sungwon Kim, Bin Hu, Vivek Singh +3 more |
2014-07-15 |
$14,407,000 |
| 8404403 |
Mask design and OPC for device manufacture |
Raguraman Venkatesan, Kevin Hooker, Sungwon Kim, Bin Hu, Vivek Singh +3 more |
2013-03-26 |
$14,049,000 |
| 8399157 |
Lithography mask having sub-resolution phased assist features |
— |
2013-03-19 |
$13,402,000 |
| 7470492 |
Process window-based correction for photolithography masks |
Robert M. Bigwood, Joseph E. Brandenburg |
2008-12-30 |
$13,967,000 |
