SL

Szuya S. Liao

IN Intel: 49 patents #648 of 30,777Top 3%
TSMC: 9 patents #2,978 of 12,232Top 25%
DP Daedalus Prime: 1 patents #13 of 21Top 65%
Overall (All Time): #39,790 of 4,157,543Top 1%
59
Patents All Time

Issued Patents All Time

Showing 25 most recent of 59 patents

Patent #TitleCo-InventorsDate
12424275 Static random-access memory (SRAM) device and related SRAM-based compute-in-memory devices Wei You, Cheng-Yin WANG 2025-09-23
12426299 Fin shaping and integrated circuit structures resulting therefrom Rahul Pandey, Rishabh Mehandru, Anupama Bowonder, Pratik A. Patel 2025-09-23
12417941 Isolation structures in semiconductor devices Jui-Chen Huang, Cheng-Yin WANG, Wei-Cheng Lin, Wei-Cheng TZENG 2025-09-16
12363992 Semiconductor device and manufacturing method thereof Kuan-Kan Hu, Jhih-Rong Huang, Yi-Bo Liao, Shuen-Shin Liang, Min-Chiang Chuang +2 more 2025-07-15
12334350 Semiconductor device and method of manufacture Meng-Yu Lin, Chun-Fu Cheng, Cheng-Yin WANG, Yi-Bo Liao 2025-06-17
12336235 Semiconductor device having isolation structure formed of low-k dielectric material and method for forming the same Szu-Hua Chen, Cheng-Ming Lin, Han-Yu Lin, Wei-Yen Woon, Ming-Jie Huang +3 more 2025-06-17
12272688 Selective growth self-aligned gate endcap (SAGE) architectures without fin end gap Leonard P. GULER, Zachary Geiger, Glenn A. Glass 2025-04-08
12266536 Mid-processing removal of semiconductor fins during fabrication of integrated circuit structures Mehmet O. Baykan, Anurag Jain 2025-04-01
12224326 Contact architecture for capacitance reduction and satisfactory contact resistance Rishabh Mehandru, Pratik A. Patel, Ralph T. Troeger 2025-02-11
12218225 Radical treatment in supercritical fluid for gate dielectric quality improvement to CFET structure Cheng-Ming Lin, Kenichi Sano, Wei-Yen Woon 2025-02-04
12131954 Selective epitaxy process for the formation of CFET local interconnection Che Chi Shih, Hsin Yang Hung, Ku-Feng Yang, Wei-Yen Woon 2024-10-29
12132079 Bonding and isolation techniques for stacked transistor structures Kuan-Kan Hu, Han-De Chen, Ku-Feng Yang, Chen-Fong Tsai, Chi On Chui 2024-10-29
12119271 Backside gate contact, backside gate etch stop layer, and methods of forming same Yi-Bo Liao, Wei-De Ho, Cheng-Ting Chung 2024-10-15
12094955 Confined epitaxial regions for semiconductor devices Michael L. Hattendorf, Tahir Ghani 2024-09-17
12027417 Source or drain structures with high germanium concentration capping layer Cory Bomberger, Suresh Vishwanath, Yulia Tolstova, Pratik A. Patel, Anand S. Murthy 2024-07-02
11984506 Field effect transistor having a gate dielectric with a dipole layer and having a gate stressor layer Vishal Tiwari, Rishabh Mehandru, Dan S. LAVRIC, Michal Mleczko 2024-05-14
11908940 Field effect transistor with a hybrid gate spacer including a low-k dielectric material Pratik A. Patel 2024-02-20
11901457 Fin shaping and integrated circuit structures resulting therefrom Rahul Pandey, Rishabh Mehandru, Anupama Bowonder, Pratik A. Patel 2024-02-13
11887860 Mid-processing removal of semiconductor fins during fabrication of integrated circuit structures Mehmet O. Baykan, Anurag Jain 2024-01-30
11869889 Self-aligned gate endcap (SAGE) architectures without fin end gap Scott B. Clendenning, Jessica M. Torres, Lukas Baumgartel, Kiran CHIKKADI, Diane LANCASTER +4 more 2024-01-09
11854894 Integrated circuit device structures and double-sided electrical testing Valluri Rao, Patrick Morrow, Rishabh Mehandru, Doug B. Ingerly, Kimin Jun +3 more 2023-12-26
11824097 Contact architecture for capacitance reduction and satisfactory contact resistance Rishabh Mehandru, Pratik A. Patel, Ralph T. Troeger 2023-11-21
11688792 Dual self-aligned gate endcap (SAGE) architectures Sairam Subramanian, Walid M. Hafez, Sridhar Govindaraju, Mark Liu, Chia-Hong Jan +2 more 2023-06-27
11640988 Confined epitaxial regions for semiconductor devices and methods of fabricating semiconductor devices having confined epitaxial regions Michael L. Hattendorf, Tahir Ghani 2023-05-02
11605632 Unidirectional self-aligned gate endcap (SAGE) architectures with gate-orthogonal walls Walid M. Hafez, Sridhar Govindaraju, Mark Liu, Chia-Hong Jan, Nick Lindert +2 more 2023-03-14