Issued Patents All Time
Showing 1–25 of 29 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12336235 | Semiconductor device having isolation structure formed of low-k dielectric material and method for forming the same | Szu-Hua Chen, Cheng-Ming Lin, Han-Yu Lin, Wei-Yen Woon, Ting-Gang Chen +3 more | 2025-06-17 |
| 11616133 | Fin field-effect transistor device and method | Che-Lun Chang, Shiao-Shin Cheng, Ji-Yin Tsai, Yu-Lin Tsai, Hsin-Chieh Huang +4 more | 2023-03-28 |
| 11316030 | Fin field-effect transistor device and method | Che-Lun Chang, Shiao-Shin Cheng, Ji-Yin Tsai, Yu-Lin Tsai, Hsin-Chieh Huang +4 more | 2022-04-26 |
| 10867807 | Semiconductor device and method | Syun-Ming Jang, Ryan Chia-Jen Chen, Ming-Ching Chang, Shu-Yuan Ku, Tai-Chun Huang +3 more | 2020-12-15 |
| 10868166 | Highly strained source/drain trenches in semiconductor devices | Ta-Wei Kao, Shiang-Bau Wang, Chi-Hsi Wu, Shu-Yuan Ku | 2020-12-15 |
| 10186511 | Metal gate isolation structure and method forming same | Chih-Han Lin, Wen-Shuo Hsieh, Ryan Chia-Jen Chen | 2019-01-22 |
| 10134604 | Semiconductor device and method | Syun-Ming Jang, Ryan Chia-Jen Chen, Ming-Ching Chang, Shu-Yuan Ku, Tai-Chun Huang +3 more | 2018-11-20 |
| 9917085 | Metal gate isolation structure and method forming same | Chih-Han Lin, Wen-Shuo Hsieh, Ryan Chia-Jen Chen | 2018-03-13 |
| 9543210 | Forming crown active regions for FinFETs | Chen-Ping Chen, Hui-Min Lin, Tung Ying Lee | 2017-01-10 |
| 9412666 | Equal gate height control method for semiconductor device with different pattern densites | Chao-Cheng Chen, Yu-Chao Lin | 2016-08-09 |
| 9214358 | Equal gate height control method for semiconductor device with different pattern densites | Yu-Chao Lin, Chao-Cheng Chen | 2015-12-15 |
| 9130058 | Forming crown active regions for FinFETs | Chen-Ping Chen, Hui-Min Lin, Tung Ying Lee | 2015-09-08 |
| 8900957 | Method of dual epi process for semiconductor device | Han-Pin Chung, Bor Chiuan Hsieh, Shiang-Bau Wang | 2014-12-02 |
| 8900956 | Method of dual EPI process for semiconductor device | Han-Pin Chung, Bor Chiuan Hsieh, Shiang-Bau Wang | 2014-12-02 |
| 8877614 | Spacer for semiconductor structure contact | Chun-Hung Ko, Jyh-Huei Chen | 2014-11-04 |
| 8835242 | Semiconductor structure and method | Chun-Hung Ko, Jyh-Huei Chen | 2014-09-16 |
| 8692353 | Semiconductor structure and method | Chun-Hung Ko, Jyh-Huei Chen | 2014-04-08 |
| 8609497 | Method of dual EPI process for semiconductor device | Han-Pin Chung, Bor Chiuan Hsieh, Shiang-Bau Wang | 2013-12-17 |
| 8563439 | Method of pitch dimension shrinkage | Chen-Ping Chen | 2013-10-22 |
| 8501570 | Method of manufacturing source/drain structures | Ziwei Fang, Jeff J. Xu, Yimin Huang, Zhiqiang Wu, Min Cao | 2013-08-06 |
| 8329546 | Modified profile gate structure for semiconductor device and methods of forming thereof | Da-Yuan Lee, Kuang-Yuan Hsu, Matt Yeh, Yi-Chen Huang, Fan-Yi Hsu +2 more | 2012-12-11 |
| 8071481 | Method for forming highly strained source/drain trenches | Ta-Wei Kao, Shiang-Bau Wang, Chi-Hsi Wu, Shu-Yuan Ku | 2011-12-06 |
| 8048764 | Dual etch method of defining active area in semiconductor device | Chen-Ping Chen, Tung Ying Lee | 2011-11-01 |
| 7141460 | Method of forming trenches in a substrate by etching and trimming both hard mask and a photosensitive layers | Hun-Jan Tao | 2006-11-28 |
| 7115450 | Approach to improve line end shortening including simultaneous trimming of photosensitive layer and hardmask | Hun-Jan Tao | 2006-10-03 |