Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12402404 | Semiconductor devices with interface between gate isolation structure and dummy channel having curved profile and methods of manufacturing thereof | Ya-Yi Tsai, Shu-Yuan Ku, Chieh-Ning Feng | 2025-08-26 |
| 12154962 | Semiconductor device and manufacturing method thereof | Chih-Han Lin, Shih-Chang Tsai, Te-Yung Liu | 2024-11-26 |
| 11804534 | Semiconductor device and manufacturing method thereof | Chih-Han Lin, Shih-Chang Tsai, Te-Yung Liu | 2023-10-31 |
| 11715736 | Semiconductor devices with gate isolation structures and methods of manufacturing thereof | Ya-Yi Tsai, Shu-Yuan Ku, Chieh-Ning Feng | 2023-08-01 |
| 11271086 | Semiconductor device and manufacturing method thereof | Chih-Han Lin, Shih-Chang Tsai, Te-Yung Liu | 2022-03-08 |
| 11145512 | Gate isolation plugs structure and method | Shih-Chang Tsai, Chih-Han Lin, Te-Yung Liu | 2021-10-12 |
| 10692723 | Gate isolation plugs structure and method | Shih-Chang Tsai, Chih-Han Lin, Te-Yung Liu | 2020-06-23 |
| 10658485 | Semiconductor device and manufacturing method thereof | Chih-Han Lin, Shih-Chang Tsai, Te-Yung Liu | 2020-05-19 |
| 10263090 | Semiconductor device and manufacturing method thereof | Chih-Han Lin, Shih-Chang Tsai, Te-Yung Liu | 2019-04-16 |
| 10186511 | Metal gate isolation structure and method forming same | Chih-Han Lin, Ming-Jie Huang, Ryan Chia-Jen Chen | 2019-01-22 |
| 10163640 | Gate isolation plugs structure and method | Shih-Chang Tsai, Chih-Han Lin, Te-Yung Liu | 2018-12-25 |
| 9917085 | Metal gate isolation structure and method forming same | Chih-Han Lin, Ming-Jie Huang, Ryan Chia-Jen Chen | 2018-03-13 |
| 6768817 | Fast and efficient computation of cubic-spline interpolation for data compression | Tsen Chung Cheng, Truieu K. Truong, Irving S. Reed, Lung J. Wang | 2004-07-27 |