Issued Patents All Time
Showing 25 most recent of 47 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12394716 | Integrated circuit interconnect structures with graphene cap | Carl Naylor, Jasmeet S. Chawla, Matthew V. Metz, Sean King, Ramanan V. Chebiam +5 more | 2025-08-19 |
| 12396254 | Stacked 2D CMOS with inter metal layers | Kevin P. O'Brien, Uygar E. Avci, Chelsey Dorow, Sudarat Lee, Kirby Maxey +4 more | 2025-08-19 |
| 12369382 | Integrated circuit structures with graphene contacts | Carl Naylor, Kirby Maxey, Kevin P. O'Brien, Chelsey Dorow, Sudarat Lee +3 more | 2025-07-22 |
| 12342551 | Capacitor architectures in semiconductor devices | Sudipto Naskar, Manish Chandhok, Abhishek A. Sharma, Roman Caudillo, Cheyun Lin | 2025-06-24 |
| 12183739 | Ribbon or wire transistor stack with selective dipole threshold voltage shifter | Nicole K. Thomas, Eric Mattson, Sudarat Lee, Tobias Brown-Heft, I-Cheng Tung +6 more | 2024-12-31 |
| 11923290 | Halogen treatment for NMOS contact resistance improvement | Siddharth Chouksey, Gilbert Dewey, Nazila Haratipour, Mengcheng Lu, Jitendra Kumar Jha +3 more | 2024-03-05 |
| 11901404 | Capacitor architectures in semiconductor devices | Sudipto Naskar, Manish Chandhok, Abhishek A. Sharma, Roman Caudillo, Cheyun Lin | 2024-02-13 |
| 11869889 | Self-aligned gate endcap (SAGE) architectures without fin end gap | Szuya S. Liao, Jessica M. Torres, Lukas Baumgartel, Kiran CHIKKADI, Diane LANCASTER +4 more | 2024-01-09 |
| 11791375 | Capacitor architectures in semiconductor devices | Sudipto Naskar, Manish Chandhok, Abhishek A. Sharma, Roman Caudillo, Cheyun Lin | 2023-10-17 |
| 11695051 | Gate stacks for FinFET transistors | Ashish Verma Penumatcha, Seung Hoon Sung, Uygar E. Avci, Ian A. Young, Jack T. Kavalieros | 2023-07-04 |
| 11672133 | Vertically stacked memory elements with air gap | Aaron D. Lilak, Patrick Morrow, Hui Jae Yoo, Sean T. Ma, Abhishek A. Sharma +2 more | 2023-06-06 |
| 11594485 | Local interconnect with air gap | Kevin Lin, Tristan A. Tronic, Urusa Alaan, Ehren Mannebach | 2023-02-28 |
| 11532724 | Selective gate spacers for semiconductor devices | Szuya S. Liao, Florian Gstrein, Rami Hourani, Patricio E. Romero, Grant Kloster +1 more | 2022-12-20 |
| 11270887 | Passivation layer for germanium substrate | Patricio E. Romero, Florian Gstrein, Cen Tan | 2022-03-08 |
| 11264449 | Capacitor architectures in semiconductor devices | Sudipto Naskar, Manish Chandhok, Abhishek A. Sharma, Roman Caudillo, Cheyun Lin | 2022-03-01 |
| 11227798 | Metal aluminum gallium indium carbide thin films as liners and barriers for interconnects | Florian Gstrein | 2022-01-18 |
| 11217456 | Selective etching and controlled atomic layer etching of transition metal oxide films for device fabrication | James M. Blackwell, Cen Tan, Marie Krysak | 2022-01-04 |
| 10998423 | Fabrication of multi-channel nanowire devices with self-aligned internal spacers and SOI FinFETs using selective silicon nitride capping | Van H. Le, Martin M. Mitan, Szuya S. Liao | 2021-05-04 |
| 10971600 | Selective gate spacers for semiconductor devices | Szuya S. Liao, Florian Gstrein, Rami Hourani, Patricio E. Romero, Grant Kloster +1 more | 2021-04-06 |
| 10896852 | Methods for doping a sub-fin region of a semiconductor fin structure and devices containing the same | Martin M. Mitan, Aaron A. Budrevich | 2021-01-19 |
| 10886175 | Differentiated molecular domains for selective hardmask fabrication and structures resulting therefrom | Eungnak Han, Rami Hourani, Florian Gstrein, Gurpreet Singh, Kevin Lin +1 more | 2021-01-05 |
| 10777366 | Method of increasing an energy density and an achievable power output of an energy storage device | Donald S. Gardner, Zhaohui Chen, Wei Jin, Eric C. Hannah, Tomm Aldridge +1 more | 2020-09-15 |
| 10756215 | Selective deposition utilizing sacrificial blocking layers for semiconductor devices | Grant Kloster, Rami Hourani, Szuya S. Liao, Patricio E. Romero, Florian Gstrein | 2020-08-25 |
| 10720508 | Fabrication of multi-channel nanowire devices with self-aligned internal spacers and SOI FinFETs using selective silicon nitride capping | Van H. Le, Martin M. Mitan, Szuya S. Liao | 2020-07-21 |
| 10658487 | Semiconductor devices having ruthenium phosphorus thin films | Han Wui Then, John J. Plombon, Michael L. McSwiney | 2020-05-19 |