Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12374588 | Method for evaluating non-uniform stress | Han-Wei Wu, Pei-Sheng TANG, Meng-Jung Lee, Hua-Tai Lin, Szu-Ping Tung +1 more | 2025-07-29 |
| 12324164 | Alignment mark for MRAM device and method | Lan-Hsin Chiang, Chien-Hua Huang, Chung-Te Lin, Yung-Yu Wang, Sheng-Yuan Chang +1 more | 2025-06-03 |
| 12119271 | Backside gate contact, backside gate etch stop layer, and methods of forming same | Yi-Bo Liao, Cheng-Ting Chung, Szuya S. Liao | 2024-10-15 |
| 12120886 | Memory device and manufacturing method thereof | Pei-Sheng TANG, Han-Wei Wu, Yuan-Hsiang Lung, Hua-Tai Lin | 2024-10-15 |
| 11804410 | Thin-film non-uniform stress evaluation | Han-Wei Wu, Pei-Sheng TANG, Meng-Jung Lee, Hua-Tai Lin, Szu-Ping Tung +1 more | 2023-10-31 |
| 11749570 | Etch monitoring and performing | Pei-Sheng TANG, Han-Wei Wu, Yuan-Hsiang Lung, Hua-Tai Lin, Chen-Jung Wang | 2023-09-05 |
| 9904163 | Cut-mask patterning process for FIN-like field effect transistor (FINFET) device | Ching-Yu Chang, Kuei-Liang Lu, Ming-Feng Shieh | 2018-02-27 |
| 9786569 | Overlay measurement and compensation in semiconductor fabrication | Shu-Hong Lin, Ya Hui Chang, Chih-Jung Chiang, Chang-Yi Tsai, Tsung-Lin Yang +1 more | 2017-10-10 |
| 9703918 | Two-dimensional process window improvement | Chi-Yuan Sun, Ya Hui Chang, Hung-Chang Hsieh | 2017-07-11 |