Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12120886 | Memory device and manufacturing method thereof | Pei-Sheng TANG, Wei-De Ho, Han-Wei Wu, Hua-Tai Lin | 2024-10-15 |
| 11996297 | Method of manufacturing a semiconductor device | Chin-Ta Chen, Han-Wei Wu, Hua-Tai Lin | 2024-05-28 |
| 11749570 | Etch monitoring and performing | Wei-De Ho, Pei-Sheng TANG, Han-Wei Wu, Hua-Tai Lin, Chen-Jung Wang | 2023-09-05 |
| 11392745 | Method for improving circuit layout for manufacturability | Yun Wu, Cheng-Cheng Kuo, Chia-Ping Chiang, Chih-Wei Hsu, Hua-Tai Lin +2 more | 2022-07-19 |
| 11158509 | Pattern fidelity enhancement with directional patterning technology | Yu-Tien Shen, Chi-Cheng Hung, Chin-Hsiang Lin, Chien-Wei Wang, Ching-Yu Chang +7 more | 2021-10-26 |
| 10853552 | Method for improving circuit layout for manufacturability | Yun Wu, Cheng-Cheng Kuo, Chia-Ping Chiang, Chih-Wei Hsu, Hua-Tai Lin +2 more | 2020-12-01 |
| 10727061 | Method for integrated circuit patterning | Tsung-Lin Yang, Hua Feng Chen, Kuei-Shun Chen, Min-Yann Hsieh, Po-Hsueh Li +2 more | 2020-07-28 |
| 10658184 | Pattern fidelity enhancement with directional patterning technology | Yu-Tien Shen, Chi-Cheng Hung, Chin-Hsiang Lin, Chien-Wei Wang, Ching-Yu Chang +7 more | 2020-05-19 |
| 10282504 | Method for improving circuit layout for manufacturability | Yun Wu, Cheng-Cheng Kuo, Chia-Ping Chiang, Chih-Wei Hsu, Hua-Tai Lin +2 more | 2019-05-07 |
| 9941125 | Method for integrated circuit patterning | Tsung-Lin Yang, Hua Feng Chen, Kuei-Shun Chen, Min-Yann Hsieh, Po-Hsueh Li +2 more | 2018-04-10 |
| 9754064 | Integrated circuit design method | Chuan-Fang Su, Kun-Zhi Chung | 2017-09-05 |
| 9477804 | Integrated circuit design method | Chuan-Fang Su, Kun-Zhi Chung | 2016-10-25 |
| 8850369 | Metal cut process flow | Kuei-Shun Chen, Meng-Wei Chen, Chia-Ying Lee | 2014-09-30 |