Issued Patents All Time
Showing 51–59 of 59 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10720508 | Fabrication of multi-channel nanowire devices with self-aligned internal spacers and SOI FinFETs using selective silicon nitride capping | Van H. Le, Scott B. Clendenning, Martin M. Mitan | 2020-07-21 |
| 10461177 | Confined epitaxial regions for semiconductor devices and methods of fabricating semiconductor devices having confined epitaxial regions | Michael L. Hattendorf, Tahir Ghani | 2019-10-29 |
| 10453967 | Semiconductor nanowire device having cavity spacer and method of fabricating cavity spacer for semiconductor nanowire device | Rishabh Mehandru, Stephen M. Cea | 2019-10-22 |
| 10410867 | Confined and scalable helmet | Vyom Sharma, Rohan K. Bambery, Christopher P. Auth, Gaurav Thareja | 2019-09-10 |
| 10396176 | Selective gate spacers for semiconductor devices | Scott B. Clendenning, Florian Gstrein, Rami Hourani, Patricio E. Romero, Grant Kloster +1 more | 2019-08-27 |
| 10319812 | Self-aligned gate edge and local interconnect and method to fabricate same | Milton Clair Webb, Mark Bohr, Tahir Ghani | 2019-06-11 |
| 10243080 | Selective deposition utilizing sacrificial blocking layers for semiconductor devices | Grant Kloster, Scott B. Clendenning, Rami Hourani, Patricio E. Romero, Florian Gstrein | 2019-03-26 |
| 9882027 | Confined epitaxial regions for semiconductor devices and methods of fabricating semiconductor devices having confined epitaxial regions | Michael L. Hattendorf, Tahir Ghani | 2018-01-30 |
| 9831306 | Self-aligned gate edge and local interconnect and method to fabricate same | Milton Clair Webb, Mark Bohr, Tahir Ghani | 2017-11-28 |