Issued Patents All Time
Showing 26–48 of 48 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10600810 | Backside fin recess control with multi-hsi option | Aaron D. Lilak, Patrick Morrow, Stephen M. Cea, Rishabh Mehandru | 2020-03-24 |
| 10497781 | Methods for doping a sub-fin region of a semiconductor structure by backside reveal and associated devices | Aaron D. Lilak, Stephen M. Cea, Rishabh Mehandru | 2019-12-03 |
| 10483385 | Nanowire structures having wrap-around contacts | Stephen M. Cea, Patrick H. Keys, Seiyon Kim, Michael Haverty, Sadasivan Shankar | 2019-11-19 |
| 10411090 | Hybrid trigate and nanowire CMOS device architecture | Rishabh Mehandru, Stephen M. Cea | 2019-09-10 |
| 10304946 | Vertical integration scheme and circuit elements architecture for area scaling of semiconductor devices | Rishabh Mehandru, Patrick Morrow, Ranjith Kumar, Seiyon Kim, Stephen M. Cea +1 more | 2019-05-28 |
| 10084087 | Enhanced dislocation stress transistor | Mark Liu, Anand S. Murthy, Hemant Deshpande, Daniel B. Aubertine | 2018-09-25 |
| 9660078 | Enhanced dislocation stress transistor | Mark Liu, Anand S. Murthy, Hemant Deshpande, Daniel B. Aubertine | 2017-05-23 |
| 9583487 | Semiconductor device having metallic source and drain regions | Martin D. Giles, Annalisa Cappellani, Sanaz Kabehie, Rafael Rios, Aaron A. Budrevich | 2017-02-28 |
| 9231076 | Enhanced dislocation stress transistor | Mark Liu, Anand S. Murthy, Hemant Deshpande, Daniel B. Aubertine | 2016-01-05 |
| 9076814 | Enhanced dislocation stress transistor | Mark Liu, Anand S. Murthy, Hemant Deshpande, Daniel B. Aubertine | 2015-07-07 |
| 8779477 | Enhanced dislocation stress transistor | Mark Liu, Anand S. Murthy, Hemant Deshpande, Daniel B. Aubertine | 2014-07-15 |
| 8716806 | Methods of channel stress engineering and structures formed thereby | Oleg Golonzka, Hemant Deshpande, Ajay Sharma, Ashutosh Ashutosh | 2014-05-06 |
| 8193049 | Methods of channel stress engineering and structures formed thereby | Oleg Golonzka, Hemant Deshpande, Ajay Sharma, Ashutosh Ashutosh | 2012-06-05 |
| 7851291 | Epitaxial silicon germanium for reduced contact resistance in field-effect transistors | Lucian Shifren, Jack T. Kavalieros, Steven M. Cea, Justin K. Brask | 2010-12-14 |
| 7566605 | Epitaxial silicon germanium for reduced contact resistance in field-effect transistors | Lucian Shifren, Jack T. Kavalieros, Steven M. Cea, Justin K. Brask | 2009-07-28 |
| 7226843 | Indium-boron dual halo MOSFET | Gerhard Schrom, Ian R. Post, Mark Stettler | 2007-06-05 |
| 7226824 | Nitrogen controlled growth of dislocation loop in stress enhanced transistor | Mark Armstrong, Harold W. Kennel, Tahir Ghani, Paul Packan, Scott Thompson | 2007-06-05 |
| 7187057 | Nitrogen controlled growth of dislocation loop in stress enhanced transistor | Mark Armstrong, Harold W. Kennel, Tahir Ghani, Paul Packan, Scott Thompson | 2007-03-06 |
| 7129533 | High concentration indium fluorine retrograde wells | Mark Armstrong, Stephen M. Cea, Giuseppe Curello, Sing-Chung Hu, Aaron D. Lilak +1 more | 2006-10-31 |
| 6838329 | High concentration indium fluorine retrograde wells | Mark Armstrong, Stephen M. Cea, Giuseppe Curello, Sing-Chung Hu, Aaron D. Lilak +1 more | 2005-01-04 |
| 6800887 | Nitrogen controlled growth of dislocation loop in stress enhanced transistor | Mark Armstrong, Harold W. Kennel, Tahir Ghani, Paul Packan, Scott Thompson | 2004-10-05 |
| 6410359 | Reduced leakage trench isolation | Kevin M. Connolly, Jung Kang, Berni W. Landau, James Breisch, Akira Kakizawa +4 more | 2002-06-25 |
| 6215165 | Reduced leakage trench isolation | Kevin M. Connolly, Jung Kang, Berni W. Landau, James Breisch, Akira Kakizawa +4 more | 2001-04-10 |