Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10084087 | Enhanced dislocation stress transistor | Cory E. Weber, Mark Liu, Anand S. Murthy, Daniel B. Aubertine | 2018-09-25 |
| 9660078 | Enhanced dislocation stress transistor | Cory E. Weber, Mark Liu, Anand S. Murthy, Daniel B. Aubertine | 2017-05-23 |
| 9312389 | FinFET with undoped body bulk | Shom Ponoth | 2016-04-12 |
| 9231076 | Enhanced dislocation stress transistor | Cory E. Weber, Mark Liu, Anand S. Murthy, Daniel B. Aubertine | 2016-01-05 |
| 9076814 | Enhanced dislocation stress transistor | Cory E. Weber, Mark Liu, Anand S. Murthy, Daniel B. Aubertine | 2015-07-07 |
| 8779477 | Enhanced dislocation stress transistor | Cory E. Weber, Mark Liu, Anand S. Murthy, Daniel B. Aubertine | 2014-07-15 |
| 8716806 | Methods of channel stress engineering and structures formed thereby | Oleg Golonzka, Ajay Sharma, Cory E. Weber, Ashutosh Ashutosh | 2014-05-06 |
| 8193049 | Methods of channel stress engineering and structures formed thereby | Oleg Golonzka, Ajay Sharma, Cory E. Weber, Ashutosh Ashutosh | 2012-06-05 |
| 7422950 | Strained silicon MOS device with box layer between the source and drain regions | Giuseppe Curello, Sunit Tyagi, Mark Bohr | 2008-09-09 |