Issued Patents All Time
Showing 25 most recent of 223 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10396070 | Fin-shaped field effect transistor and capacitor structures | Changyok Park, Akira Ito | 2019-08-27 |
| 10312365 | Laterally diffused MOSFET on fully depleted SOI having low on-resistance | Qing Liu, Akira Ito | 2019-06-04 |
| 10262992 | Three dimensional LVDMOS transistor structures | Qing Liu, Akira Ito | 2019-04-16 |
| 10236354 | Three dimensional monolithic LDMOS transistor | Qing Liu | 2019-03-19 |
| 10192781 | Interconnect structures incorporating air gap spacers | Satya V. Nitta | 2019-01-29 |
| 10134631 | Size-filtered multimetal structures | David V. Horak, Charles W. Koburger, III, Chih-Chao Yang | 2018-11-20 |
| 10121789 | Self-aligned source/drain contacts | Praneet Adusumilli, Emre Alptekin, Kangguo Cheng, Balasubramanian Pranatharthiharan | 2018-11-06 |
| 10115821 | FDSOI LDMOS semiconductor device | Akira Ito, Qing Liu | 2018-10-30 |
| 9953978 | Replacement gate structures for transistor devices | Ruilong Xie, Kisik Choi, Su Chen Fan | 2018-04-24 |
| 9941271 | Fin-shaped field effect transistor and capacitor structures | Changyok Park, Akira Ito | 2018-04-10 |
| 9935168 | Gate contact with vertical isolation from source-drain | David V. Horak, Balasubramanian Pranatharthiharan, Ruilong Xie | 2018-04-03 |
| 9825141 | Three dimensional monolithic LDMOS transistor | Qing Liu | 2017-11-21 |
| 9799524 | Extended drain MOS device for FDSOI devices | Akira Ito | 2017-10-24 |
| 9793378 | Fin field effect transistor device with reduced overlap capacitance and enhanced mechanical stability | Nicolas Loubet, Prasanna Khare, Qing Liu, Balasubramanian Pranatharthiharan | 2017-10-17 |
| 9768055 | Isolation regions for SOI devices | Qing Liu, Nicolas Loubet, Prasanna Khare, Maud Vinet, Bruce B. Doris | 2017-09-19 |
| 9741722 | Dummy gate structure for electrical isolation of a fin DRAM | John E. Barth, Jr., Kangguo Cheng, Bruce B. Doris, Herbert L. Ho, Ali Khakifirooz +4 more | 2017-08-22 |
| 9711503 | Gate structures with protected end surfaces to eliminate or reduce unwanted EPI material growth | Ruilong Xie, Juntao Li | 2017-07-18 |
| 9698148 | Reduced footprint LDMOS structure for finFET technologies | Akira Ito | 2017-07-04 |
| 9673087 | Interconnect structures incorporating air-gap spacers | Satya V. Nitta | 2017-06-06 |
| 9660030 | Replacement gate electrode with a self-aligned dielectric spacer | Marc A. Bergendahl, Steven J. Holmes, David V. Horak, Charles W. Koburger, III, Chih-Chao Yang | 2017-05-23 |
| 9633893 | Method to protect against contact related shorts on UTBB | Nicolas Loubet, Qing Liu | 2017-04-25 |
| 9627377 | Self-aligned dielectric isolation for FinFET devices | Marc A. Bergendahl, Kangguo Cheng, David V. Horak, Ali Khakifirooz, Theodorus E. Standaert +4 more | 2017-04-18 |
| 9620619 | Borderless contact structure | Veeraraghavan S. Basker, David V. Horak, Charles W. Koburger, III, Chih-Chao Yang | 2017-04-11 |
| 9614047 | Gate contact with vertical isolation from source-drain | David V. Horak, Balasubramanian Pranatharthiharan, Ruilong Xie | 2017-04-04 |
| 9613851 | Method for manufacturing interconnect structures incorporating air gap spacers | Satya V. Nitta | 2017-04-04 |