Issued Patents All Time
Showing 25 most recent of 118 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12419079 | Field effect transistor with backside source/drain | Ruilong Xie, Lawrence A. Clevenger, Brent A. Anderson, Kisik Choi, Shogo Mochizuki +1 more | 2025-09-16 |
| 12412829 | Method and structure of forming sidewall contact for stacked FET | Ruilong Xie, Julien Frougier, Ravikumar Ramachandran, Oleg Gluschenkov | 2025-09-09 |
| 12374615 | Electronic devices with a low dielectric constant | Hsueh-Chung Chen, Dechao Guo, Carl Radens, Indira Seshadri | 2025-07-29 |
| 12324236 | Bottom contact for stacked GAA FET | Indira Seshadri, Stuart A. Sieg | 2025-06-03 |
| 12310102 | Stacked vertical transport field-effect transistor logic gate structures with shared epitaxial layers | Tsung-Sheng Kang, Ardasheir Rahman, Tao Li | 2025-05-20 |
| 12310072 | Middle of line structure with stacked devices | Junli Wang, Ruqiang Bao, Albert M. Young | 2025-05-20 |
| 12310090 | CMOS top source/drain region doping and epitaxial growth for a vertical field effect transistor | Heng Wu, Ruilong Xie, Jay William Strane, Hemanth Jagannathan | 2025-05-20 |
| 12268026 | High aspect ratio contact structure with multiple metal stacks | Junli Wang, Brent A. Anderson, Terence B. Hook, Indira Seshadri, Albert M. Young +2 more | 2025-04-01 |
| 12243770 | Hard mask removal without damaging top epitaxial layer | Chanro Park, Yann Mignot, Daniel J. Vincent, Christopher J. Waskiewicz, Hsueh-Chung Chen | 2025-03-04 |
| 12237325 | Three-dimensional field effect device | Huimei Zhou, Shogo Mochizuki, Peng Xu, Nicolas Loubet | 2025-02-25 |
| 12191388 | Area scaling for VTFET contacts | Yann Mignot, Jing Guo, Lijuan Zou | 2025-01-07 |
| 12113013 | Dual color via patterning | Hsueh-Chung Chen, Yann Mignot, Mary Claire Silvestre, Chi-Chun Liu, Junli Wang | 2024-10-08 |
| 12107147 | Self-aligned gate contact for VTFETs | Huimei Zhou, Kangguo Cheng, Miaomiao Wang | 2024-10-01 |
| 11935929 | High aspect ratio shared contacts | Ruilong Xie, Julien Frougier, Ravikumar Ramachandran, Nicolas Loubet | 2024-03-19 |
| 11908923 | Low-resistance top contact on VTFET | Christopher J. Waskiewicz, Hari Prasad Amanapu, Hemanth Jagannathan | 2024-02-20 |
| 11901440 | Sacrificial fin for self-aligned contact rail formation | Yann Mignot, Christopher J. Waskiewicz, Brent A. Anderson, Junli Wang | 2024-02-13 |
| 11817502 | Three-dimensional field effect device | Huimei Zhou, Shogo Mochizuki, Peng Xu, Nicolas Loubet | 2023-11-14 |
| 11810918 | Stacked vertical transport field-effect transistor logic gate structures with shared epitaxial layers | Tsung-Sheng Kang, Ardasheir Rahman, Tao Li | 2023-11-07 |
| 11810828 | Transistor boundary protection using reversible crosslinking reflow | Jing Guo, Ekmini Anuja De Silva, Indira Seshadri, Jingyun Zhang | 2023-11-07 |
| 11742354 | Top epitaxial layer and contact for VTFET | Ruilong Xie, Christopher J. Waskiewicz, Alexander Reznicek, Heng Wu | 2023-08-29 |
| 11694958 | Layout design for threshold voltage tuning | Huimei Zhou, Miaomiao Wang, Zuoguang Liu | 2023-07-04 |
| 11646358 | Sacrificial fin for contact self-alignment | Yann Mignot, Indira Seshadri, Christopher J. Waskiewicz, Eric R. Miller | 2023-05-09 |
| 11621199 | Silicide formation for source/drain contact in a vertical transport field-effect transistor | Heng Wu, Ruilong Xie, Huai Huang | 2023-04-04 |
| 11615990 | CMOS top source/drain region doping and epitaxial growth for a vertical field effect transistor | Heng Wu, Ruilong Xie, Jay William Strane, Hemanth Jagannathan | 2023-03-28 |
| 11605717 | Wrapped-around contact for vertical field effect transistor top source-drain | Ruilong Xie, Eric R. Miller, Jeffrey C. Shearer, Heng Wu | 2023-03-14 |