Issued Patents All Time
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11908923 | Low-resistance top contact on VTFET | Christopher J. Waskiewicz, Su Chen Fan, Hemanth Jagannathan | 2024-02-20 |
| 11800817 | Phase change memory cell galvanic corrosion prevention | Injo Ok, Nicole Saulnier, Kevin W. Brew, Steven Michael McDermott, Lawrence A. Clevenger +2 more | 2023-10-24 |
| 11637036 | Planarization stop region for use with low pattern density interconnects | Cornelius Brown Peethala, Raghuveer R. Patlolla, Koichi Motoyama, Chih-Chao Yang | 2023-04-25 |
| 11127825 | Middle-of-line contacts with varying contact area providing reduced contact resistance | Chanro Park, Kangguo Cheng, Ruilong Xie | 2021-09-21 |
| 11037795 | Planarization of dielectric topography and stopping in dielectric | Cornelius Brown Peethala, Iqbal Rashid Saraf, Raghuveer R. Patlolla, Chih-Chao Yang | 2021-06-15 |
| 11037875 | Forming dual metallization interconnect structures in single metallization level | Charan V. Surisetty, Raghuveer R. Patlolla | 2021-06-15 |
| 11031337 | Forming dual metallization interconnect structures in single metallization level | Charan V. Surisetty, Raghuveer R. Patlolla | 2021-06-08 |
| 11024720 | Non-self aligned contact semiconductor devices | Ruilong Xie, Kangguo Cheng, Chanro Park | 2021-06-01 |
| 10978388 | Skip via for metal interconnects | Prasad Bhosale, Nicholas V. LiCausi, Lars Liebmann, James Jay McMahon, Cornelius Brown Peethala +1 more | 2021-04-13 |
| 10916431 | Robust gate cap for protecting a gate from downstream metallization etch operations | Raghuveer R. Patlolla, Vimal Kamineni, Sugirtha Krishnamurthy, Viraj Y. Sardesai, Cornelius Brown Peethala | 2021-02-09 |
| 10832946 | Recessed interconnet line having a low-oxygen cap for facilitating a robust planarization process and protecting the interconnect line from downstream etch operations | Samuel S. Choi | 2020-11-10 |
| 10833173 | Low-resistance top contact on VTFET | Christopher J. Waskiewicz, Su Chen Fan, Hemanth Jagannathan | 2020-11-10 |
| 10833122 | Bottom electrode and dielectric structure for MRAM applications | Raghuveer R. Patlolla, Cornelius Brown Peethala, Michael Rizzolo | 2020-11-10 |
| 10818589 | Metal interconnect structures with self-forming sidewall barrier layer | Cornelius Brown Peethala, Raghuveer Patiolla, Chih-Chao Yang | 2020-10-27 |
| 10559530 | Forming dual metallization interconnect structures in single metallization level | Charan V. Surisetty, Raghuveer R. Patlolla | 2020-02-11 |
| 10373867 | Cobalt contact and interconnect structures | Raghuveer R. Patlolla, Cornelius Brown Peethala, Chih-Chao Yang | 2019-08-06 |
| 10204829 | Low-resistivity metallic interconnect structures with self-forming diffusion barrier layers | Cornelius Brown Peethala, Raghuveer R. Patlolla, Chih-Chao Yang, Takeshi Nogami | 2019-02-12 |
| 10177030 | Cobalt contact and interconnect structures | Raghuveer R. Patlolla, Cornelius Brown Peethala, Chih-Chao Yang | 2019-01-08 |