Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12387937 | Sam formulations and cleaning to promote quick depositions | Rudy J. Wojtecki, Nicholas Anthony Lanzillo, Son V. Nguyen | 2025-08-12 |
| 12336294 | Gate-cut and separation techniques for enabling independent gate control of stacked transistors | Ruilong Xie, Nicolas Loubet, Julien Frougier, Lawrence A. Clevenger, Junli Wang +2 more | 2025-06-17 |
| 11901224 | Rework for metal interconnects using etch and thermal anneal | Terry A. Spooner, Chih-Chao Yang, Lawrence A. Clevenger | 2024-02-13 |
| 11800817 | Phase change memory cell galvanic corrosion prevention | Injo Ok, Nicole Saulnier, Kevin W. Brew, Steven Michael McDermott, Lawrence A. Clevenger +2 more | 2023-10-24 |
| 11476418 | Phase change memory cell with a projection liner | Injo Ok, Ruqiang Bao, Andrew H. Simon, Kevin W. Brew, Nicole Saulnier +1 more | 2022-10-18 |
| 11444029 | Back-end-of-line interconnect structures with varying aspect ratios | Nicholas Anthony Lanzillo, Michael Rizzolo, Chih-Chao Yang | 2022-09-13 |
| 11223655 | Semiconductor tool matching and manufacturing management in a blockchain | Nicholas Anthony Lanzillo, Michael Rizzolo, Chih-Chao Yang | 2022-01-11 |
| 11074387 | Automated method for integrated analysis of back end of the line yield, line resistance/capacitance and process performance | Michael Rizzolo, Chih-Chao Yang | 2021-07-27 |
| 10978388 | Skip via for metal interconnects | Hari Prasad Amanapu, Nicholas V. LiCausi, Lars Liebmann, James Jay McMahon, Cornelius Brown Peethala +1 more | 2021-04-13 |
| 10978342 | Interconnect with self-forming wrap-all-around barrier layer | Huai Huang, Takeshi Nogami, Alfred Grill, Benjamin D. Briggs, Nicholas Anthony Lanzillo +3 more | 2021-04-13 |
| 10658235 | Rework for metal interconnects using etch and thermal anneal | Terry A. Spooner, Chih-Chao Yang, Lawrence A. Clevenger | 2020-05-19 |
| 10585998 | Automated method for integrated analysis of back end of the line yield, line resistance/capacitance and process performance | Michael Rizzolo, Chih-Chao Yang | 2020-03-10 |
| 10461248 | Bottom electrode for MRAM applications | Raghuveer R. Patlolla, Michael Rizzolo, Chih-Chao Yang | 2019-10-29 |
| 10303829 | Automated method for integrated analysis of back end of the line yield, line resistance/capacitance and process performance | Michael Rizzolo, Chih-Chao Yang | 2019-05-28 |
| 10242872 | Rework of patterned dielectric and metal hardmask films | John C. Arnold, Donald F. Canaperi, Raghuveer R. Patlolla, Cornelius Brown Peethala, Hosadurga Shobha +1 more | 2019-03-26 |
| 10096769 | Bottom electrode for MRAM applications | Raghuveer R. Patlolla, Michael Rizzolo, Chih-Chao Yang | 2018-10-09 |